Inventor
Miwaka Takahashi
Inventor
Kyoto, JP
Overview
Patents· 16 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing23%
H04NPictorial communication, e.g. television10%
G02BOptical elements, systems or apparatus6%
H03KPulse technique6%
B32BLayered products, i.e. products built-up of strata of flat or non-flat, e.g. cellular or honeycomb, form3%
B62DMotor vehicles3%
C01GCompounds containing metals not covered by subclasses c01d or c01f3%
C01PIndexing scheme relating to structural and physical aspects of solid inorganic compounds3%
C08FMacromolecular compounds obtained by reactions only involving carbon-to-carbon unsaturated bonds3%
C08GMacromolecular compounds obtained otherwise than by reactions only involving unsaturated carbon-to-carbon bonds3%
PatentTitleYear
11,094,927Positive electrode active material particle and manufacturing method of positive electrode active material particle202111,072,364Steering device202110,992,869Image apparatus, object detection method and computer readable recording medium202110,972,660Imaging device and imaging method202110,960,651Laminate, wavelength conversion member, backlight unit, and image display device202110,904,419Image magnification ratio indicating device and image pickup apparatus20217,100,136'LSI design system'20066,671,857'Method of designing integrated circuit device using common parameter at different design levels, and database thereof'20036,668,337'Method for designing integrated circuit based on the transaction analyzing model'20036,577,541'Semiconductor integrated circuit device and control method therefor'20036,526,561'Database for designing integrated circuit device, and method for designing integrated circuit device'20036,523,157'Method for designing integrated circuit device and database for design of integrated circuit device'20036,415,423'LSI design system'20026,367,061'Semiconductor integrated circuit and manufacturing method therefor, semiconductor macro cell and automatic layout method therefor, and mask processing method'20026,096,092'Automatic synthesizing method for logic circuits'20006,000,829'Semiconductor integrated circuit capable of compensating for flucuations in power supply voltage level and method of manufacturing the same'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2006Patents assigned to MATSUSHITA ELECTRIC INDUSTRIAL CO LTD (10)· patent assignee history
1999–2006Based in Kyoto, JP· patent location history
2021Patents assigned to OLYMPUS CORP (3)· patent assignee history
2021Patents assigned to HITACHI CHEMICAL CO LTD (1)· patent assignee history
2021Patents assigned to NABTESCO CORP (1)· patent assignee history
2021Patents assigned to SEMICONDUCTOR ENERGY LAB (1)· patent assignee history
2021Based in Hachioji, JP· patent location history
2021Based in Yokohama-shi, Kanagawa, JP· patent location history
2021Based in Tsu, JP· patent location history
2021Based in Tokyo, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MATSUSHITA ELECTRIC INDUSTRIAL CO LTD | 10 | 1999–2006 |
| OLYMPUS CORP | 3 | 2021 |
| HITACHI CHEMICAL CO LTD | 1 | 2021 |
| NABTESCO CORP | 1 | 2021 |
| SEMICONDUCTOR ENERGY LAB | 1 | 2021 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kyoto, JP | 10 | 1999–2006 |
| Hachioji, JP | 3 | 2021 |
| Yokohama-shi, Kanagawa, JP | 1 | 2021 |
| Tsu, JP | 1 | 2021 |
| Tokyo, JP | 1 | 2021 |