Inventor
Sun-Hwan Hwang
Inventor
Gyeonggi-do, KR
Overview
Patents· 17 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Bprimary
H10BElectronic memory devices18%
B01JChemical or physical processes, e.g. catalysis or colloid chemistry15%
C07CAcyclic or carbocyclic compounds15%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1015%
H10DInorganic electric semiconductor devices13%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1013%
H01LSemiconductor devices8%
C01PIndexing scheme relating to structural and physical aspects of solid inorganic compounds3%
H10HInorganic light-emitting semiconductor devices having potential barriers3%
PatentTitleYear
10,843,173Ferrite catalyst for oxidative dehydrogenation, method of preparing ferrite catalyst, and method of preparing butadiene using ferrite catalyst202010,559,569Semiconductor device and method for fabricating the same202010,543,478Catalyst for oxidative dehydrogenation and method of preparing the same202010,518,250Ferrite-based catalyst composite, method of preparing the same, and method of preparing butadiene using the same201910,486,150Catalyst for oxidative dehydrogenation and method of preparing the same201910,343,958Catalyst for coating surface of porous material and method of treating surface of porous material201910,008,642Semiconductor light emitting devices20189,878,961'Nickel-M-alumina xerogel catalyst, method for preparing the same, and method for preparing methane using the catalyst'20189,871,045'Semiconductor device with damascene bit line and method for manufacturing the same'20188,580,678'Method for fabricating semiconductor device with buried gates'20138,399,323'Method for fabricating vertical channel type nonvolatile memory device'20138,309,448'Method for forming buried word line in semiconductor device'20128,048,743'Method for fabricating vertical channel type nonvolatile memory device'20117,919,373'Method for doping polysilicon and method for fabricating a dual poly gate using the same'20117,902,628'Semiconductor device with trench isolation structure'20117,888,245'Plasma doping method and method for fabricating semiconductor device using the same'20117,528,052'Method for fabricating semiconductor device with trench isolation structure'2009Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2009–2018Patents assigned to HYNIX SEMICONDUCTOR INC (9)· patent assignee history
2009–2011Based in Ichon-shi, KR· patent location history
2011–2020Based in Gyeonggi-do, KR· patent location history
2012–2018Patents assigned to HWANG SUN-HWAN (4)· patent assignee history
2013Patents assigned to HONG KWON (1)· patent assignee history
2018Patents assigned to BYUN CHANG DAE (1)· patent assignee history
2018Based in Suwon-si, KR· patent location history
2018Based in Seoul, KR· patent location history
2019–2020Patents assigned to LG CHEMICAL LTD (5)· patent assignee history
2019–2020Based in Daejeon, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| HYNIX SEMICONDUCTOR INC | 9 | 2009–2018 |
| LG CHEMICAL LTD | 5 | 2019–2020 |
| HWANG SUN-HWANself | 4 | 2012–2018 |
| BYUN CHANG DAE | 1 | 2018 |
| HONG KWON | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Gyeonggi-do, KR | 6 | 2011–2020 |
| Daejeon, KR | 5 | 2019–2020 |
| Ichon-shi, KR | 4 | 2009–2011 |
| Suwon-si, KR | 1 | 2018 |
| Seoul, KR | 1 | 2018 |