Inventor

Neng-Kuo Chen

Inventor

Hsinchu, TW

Overview

2005–2021

Patent span

Electricity

Primary field (CPC H)

Patents· 75 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary

H10DInorganic electric semiconductor devices28%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1023%

H01LSemiconductor devices20%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1017%

C09GPolishing compositions2%

B24BMachines, devices, or processes for grinding or polishing2%

C23CCoating metallic material2%

C09KMaterials for miscellaneous applications, not provided for elsewhere1%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests1%

B60HArrangements of heating, cooling, ventilating or other air-treating devices specially adapted for passenger or goods spaces of vehicles1%

PatentTitleYear

11,087,573Scheme for setting/using electronic device as keyless device of vehicle and adjusting devices in the vehicle2021 10,879,235Inter-level connection for multi-layer structures2020 10,797,156Method of forming the gate electrode of field effect transistor2020 10,651,091Wrap-around contact on FinFET2020 10,516,031Method of forming the gate electrode of field effect transistor2019 10,333,001Fin structure of FinFET2019 10,269,649Wrap-around contact on FinFET2019 10,212,339Image generation method based on dual camera module and dual camera apparatus2019 10,163,897Inter-level connection for multi-layer structures2018 10,115,597Self-aligned dual-metal silicide and germanide formation2018 9,994,736Slurry composition for chemical mechanical polishing of GE-based materials and devices2018 9,953,878Method of forming a semiconductor device2018 9,941,367Wrap-around contact on FinFET2018 9,929,272'Fin structure of FinFET'2018 9,899,496'Method of making a finFET device'2018 9,881,803'Chemical mechanical polishing method using slurry composition containing N-oxide compound'2018 9,870,956'FinFETs with nitride liners and methods of forming the same'2018 D0803641'Cutting board'2017 9,818,603'Semiconductor devices and methods of manufacture thereof'2017 9,812,551'Method of forming the gate electrode of field effect transistor'2017 9,607,826'Semiconductor device manufacturing methods and methods of forming insulating material layers'2017 9,589,803'Gate electrode of field effect transistor'2017 9,559,182'Self-aligned dual-metal silicide and germanide formation'2017 9,530,655'Slurry composition for chemical mechanical polishing of Ge-based materials and devices'2016 9,443,964'Fin structure of FinFet'2016 9,443,769'Wrap-around contact'2016 9,416,297'Chemical mechanical polishing method using slurry composition containing N-oxide compound'2016 9,368,446'Self aligned contact formation'2016 9,337,103'Method for removing hard mask oxide and making gate structure of semiconductor devices'2016 9,263,252'Method of protecting an interlayer dielectric layer and structure formed thereby'2016 9,257,323'Semiconductor device and method for forming the same'2016 9,245,792'Method for forming interconnect structures'2016 9,214,556'Self-aligned dual-metal silicide and germanide formation'2015 9,159,808'Selective etch-back process for semiconductor devices'2015 9,105,661'Fin field effect transistor gate oxide'2015 9,093,530'Fin structure of FinFET'2015 9,034,716'Method of making a FinFET device'2015 9,006,802'Semiconductor device manufacturing methods and methods of forming insulating material layers'2015 8,940,597'In-situ metal gate recess process for self-aligned contact application'2015 8,921,136'Self aligned contact formation'2014 8,853,052'Method of manufacturing a semiconductor device'2014 8,778,807'Method of reducing delamination in the fabrication of small-pitch devices'2014 8,546,242'Hybrid gap-fill approach for STI formation'2013 8,524,587'Non-uniformity reduction in semiconductor planarization'2013 8,440,580'Method of fabricating silicon nitride gap-filling layer'2013 8,367,534'Non-uniformity reduction in semiconductor planarization'2013 8,344,343'Composite film for phase change memory devices'2013 8,319,311'Hybrid STI gap-filling approach'2012 8,187,948'Hybrid gap-fill approach for STI formation'2012 8,173,516'Method of forming shallow trench isolation structure'2012 8,124,537'Method for etching integrated circuit structure'2012 8,048,813'Method of reducing delamination in the fabrication of small-pitch devices'2011 7,892,929'Shallow trench isolation corner rounding'2011 7,858,421'Method of forming metal-oxide-semiconductor transistor'2010 7,846,804'Method for fabricating high tensile stress film'2010 7,777,284'Metal-oxide-semiconductor transistor and method of forming the same'2010 7,662,730'Method for fabricating ultra-high tensile-stressed film and strained-silicon transistors thereof'2010 7,655,532'STI film property using SOD post-treatment'2010 7,655,987'Method for fabricating ultra-high tensile-stressed film and strained-silicon transistors thereof'2010 7,651,960'Chemical vapor deposition method preventing particles forming in chamber'2010 7,645,712'Method of forming contact'2010 7,642,166'Method of forming metal-oxide-semiconductor transistors'2010 7,588,883'Method for forming a gate and etching a conductive layer'2009 7,585,790'Method for forming semiconductor device'2009 7,566,668'Method of forming contact'2009 7,544,603'Method of fabricating silicon nitride layer and method of fabricating semiconductor device'2009 7,541,298'STI of a semiconductor device and fabrication method thereof'2009 7,494,878'Metal-oxide-semiconductor transistor and method of forming the same'2009 7,485,515'Method of manufacturing metal oxide semiconductor'2009 7,332,447'Method of forming a contact'2008 7,294,572'Method of forming contact'2007 7,238,586'Seamless trench fill method utilizing sub-atmospheric pressure chemical vapor deposition technique'2007 6,989,337'Silicon oxide gap-filling process'2006 6,913,978'Method for forming shallow trench isolation structure'2005 6,891,244'Plug structure having low contact resistance and method of manufacturing'2005

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2005–2013Patents assigned to UNITED MICROELECTRONICS CORP (20)· patent assignee history

2005–2020Based in Hsinchu, TW· patent location history

2010–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (23)· patent assignee history

2010–2020Based in Jhudong Township, TW· patent location history

2012–2017Patents assigned to CHEN NENG-KUO (16)· patent assignee history

2012–2016Patents assigned to TSAI CHENG-YUAN (8)· patent assignee history

2012–2018Based in Tainan, TW· patent location history

2016–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (26)· patent assignee history

2019Based in Guangdong, CN· patent location history

2021Based in Hsin Chu, TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
TAIWAN SEMICONDUCTOR MFG CO LTD	26	2016–2020
TAIWAN SEMICONDUCTOR MFG	23	2010–2016
UNITED MICROELECTRONICS CORP	20	2005–2013
CHEN NENG-KUOself	16	2012–2017
TSAI CHENG-YUAN	8	2012–2016

Locations

Location	Patents	Span
Hsinchu, TW	40	2005–2020
Jhudong Township, TW	22	2010–2020
Tainan, TW	8	2012–2018
Hsin Chu, TW	1	2021
Guangdong, CN	1	2019