Inventor

Hirohide Sugahara

Inventor
Kawasaki, JP

Overview

25→
Patents
1995–2010
Patent span
Physics
Primary field (CPC G)

Patents· 25 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing82%
H04LTransmission of digital information, e.g. telegraphic communication11%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use4%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests4%
PatentTitleYear
7,818,479'Interface apparatus and packet transfer method'20107,664,042'Storage control apparatus, storage apparatus, storage control method, and computer-readable recording medium for executing a command based on data in received packet'20107,424,628'Serial type interface circuit, power saving method thereof, and device having serial interface'20087,103,128'Data synchronization circuit and communication interface circuit'20066,901,451'PCI bridge over network'20056,877,039'Simplified pipeline writes over a network'20056,804,673'Access assurance for remote memory access over network'20046,799,219'Method and apparatus for avoiding starvation in computer network'20046,732,212'Launch raw packet on remote interrupt'20046,684,281'Fast delivery of interrupt message over network'20046,678,758'Dynamic queuing for read/write requests'20046,092,173'Multiprocessor, memory accessing method for multiprocessor, transmitter and receiver in data transfer system, data transfer system, and bus control method for data transfer system'20006,038,674'Multiprocessor, memory accessing method for multiprocessor, transmitter and receiver in data transfer system, data transfer system, and bus control method for data transfer system'20005,890,217'Coherence apparatus for cache of multiprocessor'19995,761,728'Asynchronous access system controlling processing modules making requests to a shared system memory'19985,737,573'Asynchronous access system having an internal buffer control circuit which invalidates an internal buffer'19985,734,845'Bus arbiter provided in a multi-processor system'19985,727,151'Message control system specifying message storage buffer for data communication system with general purpose and arbitrary form buffers'19985,708,795'Asynchronous access system for multiprocessor system and processor module used in the asynchronous access system'19985,704,056'Cache-data transfer system'19975,634,037'Multiprocessor system having a shared memory with exclusive access for a requesting processor which is maintained until normal completion of a process and for retrying the process when not normally completed'19975,592,624'Data communication for controlling message transmission and reception among processing modules using information stored in descriptor to form a loosely coupled multiprocessing system'19975,500,945'Apparatus and method for controlling a system bus of a multiprocessor system'19965,428,768'System for checking comparison check function of information processing apparatus'19955,402,421'Bus control device and bus control method'1995

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1995–2008Patents assigned to FUJITSU LTD (23)· patent assignee history
1995–2010Based in Kawasaki, JP· patent location history
1999–2000Patents assigned to PFU LTD (3)· patent assignee history
2010Patents assigned to TOSHIBA STORAGE DEVICE CORP (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
FUJITSU LTD231995–2008
PFU LTD31999–2000
TOSHIBA STORAGE DEVICE CORP22010
Locations
LocationPatentsSpan
Kawasaki, JP251995–2010