Inventor

Shirish Gadre

Inventor

Fremont, CA, US

Overview

1999–2020

Patent span

Physics

Primary field (CPC G)

Patents· 61 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing41%

H04NPictorial communication, e.g. television26%

G06TImage data processing or generation, in general14%

G09GArrangements or circuits for control of indicating devices using static means to present variable information11%

G11BInformation storage based on relative movement between record carrier and transducer2%

G11CStatic stores2%

H04LTransmission of digital information, e.g. telegraphic communication2%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%

H03MCoding1%

PatentTitleYear

10,877,757Binding constants at runtime for improved resource utilization2020 10,866,806Uniform register file for improved resource utilization2020 10,705,994Unified cache for diverse memory traffic2020 10,699,427Method and apparatus for obtaining sampled positions of texturing operations2020 10,503,513Dispatching a stored instruction in response to determining that a received instruction is of a same instruction type2019 10,459,861Unified cache for diverse memory traffic2019 10,424,074Method and apparatus for obtaining sampled positions of texturing operations2019 10,289,418Cooperative thread array granularity context switch during trap handling2019 10,235,208Technique for saving and restoring thread group operating state2019 10,152,329Pre-scheduled replays of divergent operations2018 10,114,755System, method, and computer program product for warming a cache for a task launch2018 10,095,542Cooperative thread array granularity context switch during trap handling2018 10,095,548Mechanism for waking common resource requests within a resource management subsystem2018 10,007,527Uniform load processing for parallel thread sub-sets2018 9,836,325Resource management subsystem that maintains fairness and order2017 9,830,224Selective fault stalling for a GPU memory pipeline in a unified virtual memory system2017 9,804,885'Cooperative thread array granularity context switch during trap handling'2017 9,755,994'Mechanism for tracking age of common resource requests within a resource management subsystem'2017 9,721,381'System, method, and computer program product for discarding pixel samples'2017 9,720,858'Technique for performing memory access operations via texture hardware'2017 9,697,006'Technique for performing memory access operations via texture hardware'2017 9,678,897'Approach for context switching of lock-bit protected memory'2017 9,665,969'Data path and instruction set for packed pixel operations for video processing'2017 9,626,191'Shaped register file reads'2017 9,612,836'System, method, and computer program product for implementing software-based scoreboarding'2017 9,471,307'System and processor that include an implementation of decoupled pipelines'2016 9,448,837'Cooperative thread array granularity context switch during trap handling'2016 9,348,762'Technique for accessing content-addressable memory'2016 9,262,174'Dynamic bank mode addressing for memory access'2016 9,111,368'Pipelined L2 cache for memory transfers for a video processor'2015 8,997,103'N-way memory barrier operation coalescing'2015 8,736,623'Programmable DMA engine for implementing memory transfers and video processing for a video processor'2014 8,738,891'Methods and systems for command acceleration in a video processor via translation of scalar instructions into vector instructions'2014 8,698,817'Video processor having scalar and vector components'2014 8,687,008'Latency tolerant system for executing video processing operations'2014 8,683,184'Multi context execution on a video processor'2014 8,493,396'Multidimensional datapath processing in a video processor'2013 8,424,012'Context switching on a video processor having a scalar execution unit and a vector execution unit'2013 8,416,251'Stream processing in a video processor'2013 7,606,391'Video content scene change determination'2009 7,167,640'Method and apparatus for efficiently allocating memory in audio still video (ASV) applications'2007 7,165,128'Multifunctional I/O organizer unit for multiprocessor multimedia chips'2007 7,099,569'Method and apparatus for efficiently allocating memory when switching between DVD audio and DVD video'2006 6,934,338'Variable length decoder for decoding digitally encoded video signals'2005 6,922,770'Memory controller providing dynamic arbitration of memory commands'2005 6,741,794'System and method for flexibly blending multiple image planes in a video device'2004 6,704,361'Variable length decoder for decoding digitally encoded video signals'2004 6,518,985'Display unit architecture'2003 6,308,253'RISC CPU instructions particularly suited for decoding digital signal processing applications'2001 6,285,715'Methods and apparatus for error concealment while decoding a coded video bit stream'2001 6,259,479'Letterbox filter apparatus and method'2001 6,215,822'Motion compensated digital video decoding and buffer memory addressing therefor'2001 6,175,597'Methods and apparatus for error concealment'2001 6,128,340'Decoder system with 2.53 frame display buffer'2000 6,088,047'Motion compensated digital video decoding with buffered picture storage memory map'2000 6,078,616'Methods and apparatus for error concealment utilizing temporal domain motion vector estimation'2000 6,041,400'Distributed extensible processing architecture for digital signal processing applications'2000 6,012,137'Special purpose processor for digital audio/video decoding'2000 5,995,161'Digital video processor with subvideo processor'1999 5,928,321'Task and stack manager for digital video decoding'1999 5,903,311'Run level pair buffering for fast variable length decoder circuit'1999

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1999–2009Patents assigned to SONY ELECTRONICS INC (20)· patent assignee history

1999–2009Patents assigned to SONY CORP (18)· patent assignee history

1999–2007Based in San Jose, CA, US· patent location history

2009–2020Based in Fremont, CA, US· patent location history

2013–2020Patents assigned to NVIDIA CORP (39)· patent assignee history

2013–2018Patents assigned to GADRE SHIRISH (18)· patent assignee history

2013–2015Patents assigned to KARANDIKAR ASHISH (9)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
NVIDIA CORP	39	2013–2020
SONY ELECTRONICS INC	20	1999–2009
GADRE SHIRISHself	18	2013–2018
SONY CORP	18	1999–2009
KARANDIKAR ASHISH	9	2013–2015

Locations

Location	Patents	Span
Fremont, California, US	40	2009–2020
San Jose, California, US	21	1999–2007