Inventor

Sanka Ganesan

Inventor

Chandler, AZ, US

Overview

28→

Patents

2010–2020

Patent span

Electricity

Primary field (CPC H)

Patents· 28 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1032%

H01LSemiconductor devices25%

H05KPrinted circuits15%

H01RElectrically-conductive connections8%

Y02PClimate change mitigation technologies in the production or processing of goods4%

Y10TTechnical subjects covered by former us classification4%

H01BCables3%

B23KSoldering or unsoldering1%

B81BMicrostructural devices or systems, e.g. micromechanical devices1%

H01PWaveguides1%

PatentTitleYear

10,784,204Rlink--die to die channel interconnect configurations to improve signaling2020 10,672,693Integrated circuit structures in package substrates2020 10,658,765Edge-firing antenna walls built into substrate2020 10,658,279High density package interconnects2020 10,651,116Planar integrated circuit package interconnects2020 10,580,758Scalable package architecture and associated techniques and configurations2020 10,396,036Rlink-ground shielding attachment structures and shadow voiding for data signal contacts of package devices; vertical ground shielding structures and shield fencing of vertical data signal interconnects of package devices; and ground shielding for electro optical module connector data signal contacts and contact pins of package devices2019 10,204,851High density package interconnects2019 10,170,409Package on package architecture and method for making2019 10,037,976Scalable package architecture and associated techniques and configurations2018 9,922,916'High density package interconnects'2018 9,832,876CPU package substrates with removable memory mechanical interfaces2017 9,793,244'Scalable package architecture and associated techniques and configurations'2017 9,721,880'Integrated circuit package structures'2017 9,660,364'System interconnect for integrated circuits'2017 9,640,887'Low profile zero/low insertion force package top side flex cable connector architecture'2017 9,564,412'Shaped and oriented solder joints'2017 9,368,437'High density package interconnects'2016 9,332,643'Interconnect architecture with stacked flex cable'2016 9,324,678'Low profile zero/low insertion force package top side flex cable connector architecture'2016 9,265,170'Integrated circuit connectors'2016 9,233,835'Shaped and oriented solder joints'2016 8,513,792'Package-on-package interconnect stiffener'2013 8,508,947'Flex cable and method for making the same'2013 8,353,101'Method of making substrate package with through holes for high speed I/O flex cable'2013 8,188,594'Input/output package architectures'2012 7,888,784'Substrate package with through holes for high speed I/O flex cable'2011 7,705,447'Input/output package architectures, and methods of using same'2010

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2010–2020Patents assigned to INTEL CORP (28)· patent assignee history

2010–2020Based in Chandler, AZ, US· patent location history

2012–2019Patents assigned to GANESAN SANKA (8)· patent assignee history

2012–2013Patents assigned to AYGUN KEMAL (2)· patent assignee history

2013–2019Patents assigned to GUZEK JOHN S (2)· patent assignee history

2013–2016Patents assigned to VISWANATH RAM S (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
INTEL CORP	28	2010–2020
GANESAN SANKAself	8	2012–2019
AYGUN KEMAL	2	2012–2013
GUZEK JOHN S	2	2013–2019
VISWANATH RAM S	2	2013–2016

Locations

Location	Patents	Span
Chandler, AZ, US	28	2010–2020