Inventor
Augusto J. Vega
Inventor
Astoria, NY, US
Overview
Patents· 21 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing35%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use28%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications15%
H04LTransmission of digital information, e.g. telegraphic communication7%
H04WWireless communication networks7%
G06NComputing arrangements based on specific computational models4%
G05BControl or regulating systems in general2%
G05DSystems for controlling or regulating non-electric variables2%
PatentTitleYear
10,839,311Cognitive computing for servers and mobile devices202010,635,490Optimization of application workflow in mobile embedded devices202010,613,603Inducing heterogeneous microprocessor behavior using non-uniform cooling202010,599,996Cognitive computing for servers and mobile devices202010,582,421Adaptive network with interconnected autonomous devices202010,558,249Sensor-based non-uniform cooling202010,534,608Local computation logic embedded in a register file to accelerate programs202010,368,267Adaptive network with interconnected autonomous devices201910,317,962Inducing heterogeneous microprocessor behavior using non-uniform cooling201910,075,875Adaptive network with interconnected autonomous devices20189,933,844Clustering execution in a processing system to increase power savings20189,921,639'Clustering execution in a processing system to increase power savings'20189,690,555'Optimization of application workflow in mobile embedded devices'20179,632,560'Delaying execution in a processor to increase power savings'20179,632,559'Delaying execution in a processor to increase power savings'20179,423,859'Delaying execution in a processor to increase power savings'20169,389,675'Power management for in-memory computer systems'20169,361,175'Dynamic detection of resource management anomalies in a processing system'20169,354,943'Power management for multi-core processing systems'20169,146,609'Thread consolidation in processor cores'20159,141,173'Thread consolidation in processor cores'2015Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2015–2020Patents assigned to IBM (21)· patent assignee history
2015Based in New York, NY, US· patent location history
2016–2020Based in Astoria, NY, US· patent location history
2016Based in Dobbs Ferry, NY, US· patent location history
2018Based in Barcelona, ES· patent location history
2020Patents assigned to BOSE PRADIP (1)· patent assignee history
2020Patents assigned to BUYUKTOSUNOGLU ALPER (1)· patent assignee history
2020Patents assigned to DERBY JEFFREY HASKELL (1)· patent assignee history
2020Patents assigned to FRANCESCHINI MICHELE MARTINO (1)· patent assignee history
2020Based in Yorktown Heights, NY, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 21 | 2015–2020 |
| BOSE PRADIP | 1 | 2020 |
| BUYUKTOSUNOGLU ALPER | 1 | 2020 |
| DERBY JEFFREY HASKELL | 1 | 2020 |
| FRANCESCHINI MICHELE MARTINO | 1 | 2020 |
Locations
| Location | Patents | Span |
|---|---|---|
| Astoria, New York, US | 15 | 2016–2020 |
| Barcelona, ES | 2 | 2018 |
| New York, New York, US | 2 | 2015 |
| Yorktown Heights, New York, US | 1 | 2020 |
| Dobbs Ferry, New York, US | 1 | 2016 |