Inventor
CHAO-HSUN WANG
Inventor
TW
Overview
Patents· 39 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices25%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1025%
H10DInorganic electric semiconductor devices24%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1021%
B82YSpecific uses or applications of nanostructures2%
H10BElectronic memory devices2%
PatentTitleYear
12,593,670Contact formation method and related structure202612,550,408Connection between gate and source/drain feature202612,543,553Forming liners to facilitate the formation of copper-containing vias in advanced technology nodes202612,506,034—202512,406,907Semiconductor structure with conductive_structure202512,389,646Semiconductor transistor structure with nanostructures and conductive structure and method for manufacturing the same202512,363,947Structure and formation method of semiconductor device with contact structures202512,342,598Forming metal contacts on metal gates202512,278,188Different via configurations for different via interface requirements202512,266,703Dielectric structures for semiconductor device structures202512,243,940Methods of forming air spacers in semiconductor devices202512,211,787Interconnect structures and methods of fabrication thereof202512,176,435Method for forming fin field effect transistor (FinFET) device structure with conductive layer between gate and gate contact202412,142,565Different via configurations for different via interface requirements202412,125,743Via-first process for connecting a contact and a gate electrode202412,107,166Fin field effect transistor (FinFET) device structure with isolation layer and method for forming the same202412,074,063Contact formation method and related structure202412,057,392Conductive features having varying resistance202411,978,664Polishing interconnect structures in semiconductor devices202411,961,886Semiconductor structure with conductive structure202411,915,971Contact formation method and related structure202411,901,426Forming metal contacts on metal gates202411,855,154Vertical interconnect features and methods of forming202311,682,729Methods of forming air spacers in semiconductor devices202311,682,579Method of forming trenches with different depths202311,670,544Via-first process for connecting a contact and a gate electrode202311,640,936Interconnect structures and methods of fabrication thereof202311,532,561Different via configurations for different via interface requirements202211,532,717Forming metal contacts on metal gates202211,527,614Semiconductor structure with conductive structure and method for manufacturing the same202211,508,822Source/drain via having reduced resistance202211,430,691Polishing interconnect structures in semiconductor devices202211,348,830Method of forming trenches with different depths202211,322,394Contact formation method and related structure202211,271,112Method for forming fin field effect transistor (FINFET) device structure with conductive layer between gate and gate contact202211,227,950Methods of forming air spacers in semiconductor devices202211,227,830Conductive features having varying resistance202211,189,525Via-first process for connecting a contact and a gate electrode202111,177,212Contact formation method and related structure2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2026Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (39)· patent assignee history
2021–2026Based in TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 39 | 2021–2026 |
Locations
| Location | Patents | Span |
|---|---|---|
| TW | 39 | 2021–2026 |