Inventor

Paolo Rolandi

Inventor

Voghera, IT

Overview

1993–2020

Patent span

Physics

Primary field (CPC G)

Patents· 72 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary

G11CStatic stores65%

Y10TTechnical subjects covered by former us classification9%

G06FElectric digital data processing6%

H10BElectronic memory devices6%

H03KPulse technique5%

H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems2%

H10DInorganic electric semiconductor devices2%

G01RMeasuring electric variables1%

G05FSystems for regulating electric or magnetic variables1%

H01LSemiconductor devices1%

PatentTitleYear

10,825,524Memory device with a common source select line for two memory portions of a logic sector2020 10,825,525Programming non-volatile electronic memory device with NAND architecture2020 10,170,191Electronic memory device having two portions that can be decoupled2019 9,287,284'Semiconductor field-effect transistor, memory cell and memory device'2016 9,262,317'Non-volatile configuration for serial non-volatile memory'2016 9,251,065'Execute-in-place mode configuration for serial non-volatile memory'2016 8,954,660'Execute-in-place mode configuration for serial non-volatile memory'2015 8,824,205'Non-volatile electronic memory device with NAND structure being monolithically integrated on semiconductor'2014 8,759,915'Semiconductor field-effect transistor, memory cell and memory device'2014 8,635,398'Execute-in-place mode configuration for serial non-volatile memory'2014 8,630,115'Non-volatile electronic memory device with NAND structure being monolithically integrated on semiconductor'2014 8,626,990'Non-volatile configuration for serial non-volatile memory'2014 7,885,123'Integrated circuit for memory card and memory card using the circuit'2011 7,649,778'Method for accessing in reading, writing and programming to a NAND non-volatile memory electronic device monolithically integrated on semiconductor'2010 7,649,773'Row selector circuit for electrically programmable and erasable non volatile memories'2010 7,529,881'Method for accessing in reading, writing and programming to a nand non-volatile memory electronic device monolithically integrated on semiconductor'2009 7,525,851'Row decoder circuit and related system and method'2009 7,447,103'Row decoder circuit for electrically programmable and erasable non volatile memories'2008 7,417,900'Method and system for refreshing a memory device during reading thereof'2008 7,397,700'Non-volatile memory electronic device with NAND structure being monolithically integrated on semiconductor'2008 7,397,702'Read/verify circuit for multilevel memory cells with ramp read voltage, and read/verify method thereof'2008 7,295,472'Integrated electronic non-volatile memory device having nand structure'2007 7,274,594'Non-volatile memory electronic device with NAND structure being monolithically integrated on semiconductor'2007 7,136,305'Sense amplifier with equalizer'2006 7,075,844'Parallel sense amplifier with mirroring of the current to be measured into each reference branch'2006 7,072,212'String programmable nonvolatile memory with NOR architecture'2006 6,967,876'Method for controlling programming voltage levels of non-volatile memory cells, the method tracking the cell features, and corresponding voltage regulator'2005 6,965,523'Multilevel memory device with memory cells storing non-power of two voltage levels'2005 6,954,395'String programmable nonvolatile memory with NOR architecture'2005 6,920,066'Programming method of the memory cells in a multilevel non-volatile memory device'2005 6,882,231'Adjustable frequency oscillator with programmable calibrating circuit and related system and method'2005 6,816,407'Method for storing and reading data in a multilevel nonvolatile memory, and architecture therefor'2004 6,683,808'String programmable nonvolatile memory with NOR architecture'2004 6,657,895'Reading circuit and method for a multilevel non-volatile memory'2003 6,605,985'High-efficiency power charge pump supplying high DC output currents'2003 6,570,216'EEPROM having a peripheral integrated transistor with thick oxide'2003 6,559,709'Low-consumption charge pump for a nonvolatile memory'2003 6,549,473'Circuital structure for reading data in a non-volatile memory device'2003 6,525,961'Method and circuit for programming a multilevel non-volatile memory'2003 6,507,517'Circuital structure for programming data in a non-volatile memory device'2003 6,476,664'Integrated device with voltage selector'2002 6,466,479'Non-volatile memory matrix architecture with vertical insulation strips between adjacent memory blocks'2002 6,438,669'Timesharing internal bus, particularly for non-volatile memories'2002 6,429,634'Voltage boosting device, in particular for speeding power-up of multilevel nonvolatile memories'2002 6,414,875'String programmable nonvolatile memory with NOR architecture'2002 6,363,015'Reading method for non-volatile memories with sensing ratio variable with the reading voltage, and device to realize said method'2002 6,301,157'Method and circuit for testing memory cells in a multilevel memory device'2001 6,198,660'Synchronous multilevel non-volatile memory and related reading method'2001 6,156,610'Process for manufacturing an EEPROM having a peripheral transistor with thick oxide'2000 6,147,902'High storage capacity non-volatile memory'2000 6,115,801'Device and method for increasing the internal address of a memory device using multifunctional terminals'2000 6,101,121'Multi-level memory circuit with regulated reading voltage'2000 6,101,127'Operating voltage selection circuit for non-volatile semiconductor memories'2000 6,097,628'Multi-level memory circuit with regulated writing voltage'2000 6,016,271'Method and circuit for generating a gate voltage in non-volatile memory devices'2000 6,009,041'Method and circuit for trimming the internal timing conditions of a semiconductor memory device'1999 5,999,445'Multilevel non-volatile memory devices'1999 5,973,966'Reading circuit for semiconductor memory cells'1999 5,949,666'Staircase adaptive voltage generator circuit'1999 5,923,975'Fabrication of natural transistors in a nonvolatile memory process'1999 5,883,837'Reading circuit for semiconductor memory cells'1999 5,859,795'Multi-level memory circuits and corresponding reading and writing methods'1999 5,841,728'Hierarchic memory device having auxiliary lines connected to word lines'1998 5,821,788'Zero consumption power-on-reset'1998 5,815,437'Data input/output managing device, particularly for a non-volatile memory'1998 5,796,275'High voltages detector circuit and integrated circuit using same'1998 5,754,483'Reference word line and data propagation reproduction circuit for memories provided with hierarchical decoders'1998 5,710,739'Reading circuit for memory cells'1998 5,696,716'Programmable memory element'1997 5,659,498'Unbalanced latch and fuse circuit including the same'1997 5,267,202'Reading device for EPROM memory cells with the operational field independent of the threshold jump of the written cells with respect to the virgin cells'1993 5,179,300'Data output stage having feedback loops to precharge the output node'1993

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1993–2011Patents assigned to ST MICROELECTRONICS SRL (39)· patent assignee history

1993–2003Patents assigned to SGS THOMSON MICROELECTRONICS (17)· patent assignee history

1993–2000Based in Volpedo, IT· patent location history

1997–2000Based in Alessandria, IT· patent location history

1998–2020Based in Voghera, IT· patent location history

2009–2014Patents assigned to ROLANDI PAOLO (8)· patent assignee history

2009–2014Patents assigned to PASCUCCI LUIGI (6)· patent assignee history

2014–2020Patents assigned to MICRON TECHNOLOGY INC (12)· patent assignee history

2016Based in Agrate Brianza, IT· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
ST MICROELECTRONICS SRL	39	1993–2011
SGS THOMSON MICROELECTRONICS	17	1993–2003
MICRON TECHNOLOGY INC	12	2014–2020
ROLANDI PAOLOself	8	2009–2014
PASCUCCI LUIGI	6	2009–2014

Locations

Location	Patents	Span
Voghera, IT	60	1998–2020
Volpedo, IT	9	1993–2000
Alessandria, IT	2	1997–2000
Agrate Brianza, IT	1	2016