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Inventor

Nicholas B. Peterson

Inventor
San Jose, CA, US

Overview

5→
Patents
1996–2016
Patent span
Physics
Primary field (CPC G)

Patents· 5 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing71%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses29%
PatentTitleYear
9,385,728'Integrated clock differential buffering'20168,860,479'Integrated clock differential buffering'20146,055,372'Serial interrupt bus protocol'20005,671,421'Serial interrupt bus protocol'19975,535,420'Method and apparatus for interrupt signaling in a computer system'1996

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1996–2016Patents assigned to INTEL CORP (5)· patent assignee history
1996–2016Based in San Jose, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
INTEL CORP51996–2016
Locations
LocationPatentsSpan
San Jose, California, US51996–2016