Inventor
MASSIMO SUTERA
Inventor
US
Overview
Patents· 6 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing83%
G11CStatic stores17%
PatentTitleYear
12,474,848Techniques for memory resource control using memory resource partitioning and monitoring202512,451,206Extending functionality of memory controllers using a loopback mode for testing in a processor-based device202512,314,130Parity protected memory blocks merged with error correction code (ECC) protected blocks in a codeword for increased memory utilization202512,204,410Integrated error correction code (ECC) and parity protection in memory control circuits for increased memory utilization202512,159,056Extending functionality of memory controllers in a processor-based device202411,934,263Parity protected memory blocks merged with error correction code (ECC) protected blocks in a codeword for increased memory utilization2024Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2024–2025Patents assigned to AMPERE COMPUTING LLC (6)· patent assignee history
2024–2025Based in US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| AMPERE COMPUTING LLC | 6 | 2024–2025 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 6 | 2024–2025 |