Inventor
Wen-Wei Lo
Inventor
Pan Chiao, TW
Overview
Patents· 4 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1050%
H10BElectronic memory devices38%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1013%
PatentTitleYear
6,777,280'Method for fabricating an integrated circuit with a transistor electrode'20046,406,953'Method for fabricating an integrated circuit with a transistor electrode'20026,274,509'Global planarization method for inter-layer-dielectric and inter-metal dielectric'20016,133,597'Biasing an integrated circuit well with a transistor electrode'2000Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2000Patents assigned to MOSEL VITELIC CORP (1)· patent assignee history
2000–2004Based in Pan Chiao, TW· patent location history
2001–2004Patents assigned to MOSEL VITELIC INC (3)· patent assignee history
2001Based in Ban-Chiao, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MOSEL VITELIC INC | 3 | 2001–2004 |
| MOSEL VITELIC CORP | 1 | 2000 |
Locations
| Location | Patents | Span |
|---|---|---|
| Pan Chiao, TW | 3 | 2000–2004 |
| Ban-Chiao, TW | 1 | 2001 |