Inventor

Andrew E. Phelps

Inventor

Middleton, WI, US

Overview

1985–2021

Patent span

Physics

Primary field (CPC G)

Patents· 72 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing73%

G06NComputing arrangements based on specific computational models22%

C08GMacromolecular compounds obtained otherwise than by reactions only involving unsaturated carbon-to-carbon bonds1%

C09DCoating compositions, e.g. paints, varnishes or lacquers1%

G11CStatic stores1%

H04LTransmission of digital information, e.g. telegraphic communication1%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests1%

PatentTitleYear

11,061,854Vector reduction processor2021 11,049,016Neural network processor2021 11,016,764Vector processing unit2021 10,920,103Silicone-containing polyesters, coating compositions containing the same, and coatings formed therefrom2021 10,838,724Accessing data in multi-dimensional tensors2020 10,831,862Performing matrix multiplication in hardware2020 10,810,154Single-sided distributed storage system2020 10,706,007Vector reduction processor2020 10,698,974Low latency matrix multiply unit2020 10,699,188Neural network processor2020 10,698,976Low latency matrix multiply unit2020 10,635,740Low latency matrix multiply unit2020 10,621,269Performing matrix multiplication in hardware2020 10,614,151Permuting in a matrix-vector processor2020 10,592,583Permuting in a matrix-vector processor2020 10,514,891Multi-input floating-point adder2019 10,438,117Computing convolutions using a neural network processor2019 10,387,364Single-sided distributed storage system2019 10,261,786Vector processing unit2019 10,228,947Accessing data in multi-dimensional tensors2019 10,216,705Permuting in a matrix-vector processor2019 10,108,581Vector reduction processor2018 9,959,247Permuting in a matrix-vector processor2018 9,916,279'Single-sided distributed storage system'2018 9,875,104Accessing data in multi-dimensional tensors2018 9,875,100Accessing data in multi-dimensional tensors2018 9,747,546'Neural network processor'2017 9,710,748'Neural network processor'2017 9,697,463'Computing convolutions using a neural network processor'2017 9,229,901'Single-sided distributed storage system'2016 8,862,561'Detecting read/write conflicts'2014 8,676,851'Executing transactions in distributed storage systems'2014 8,028,130'Pipeline structure for a shared memory protocol'2011 7,251,748'System and method for determining a global ordering of events using timestamps'2007 7,181,674'Computer system including a network employing redundant information and slicing'2007 7,055,016'Computer system including a memory controller configured to perform pre-fetch operations'2006 7,020,753'Inter-domain data transfer'2006 6,970,980'System with multicast invalidations and split ownership and access right coherence mechanism'2005 6,961,827'Victim invalidation'2005 6,941,493'Memory subsystem including an error detection mechanism for address and control signals'2005 6,920,584'System design verification using selected states of a processor-based system to reveal deficiencies'2005 6,915,450'Method and apparatus for arbitrating transactions between domains in a computer system'2005 6,898,728'System domain targeted, configurable interconnection'2005 6,877,108'Method and apparatus for providing error isolation in a multi-domain computer system'2005 6,871,294'Dynamically reconfigurable interconnection'2005 6,721,852'Computer system employing multiple board sets and coherence schemes'2004 6,571,360'Cage for dynamic attach testing of I/O boards'2003 6,408,409'Method and apparatus for ring buffer flow error detection'2002 5,966,729'Snoop filter for use in multiprocessor computer systems'1999 5,745,721'Partitioned addressing apparatus for vector/scalar registers'1998 5,717,881'Data processing system for processing one and two parcel instructions'1998 5,706,490'Method of processing conditional branch instructions in scalar/vector processor'1998 5,659,706'Vector/scalar processor with simultaneous processing and instruction cache filling'1997 5,640,524'Method and apparatus for chaining vector instructions'1997 5,623,650'Method of processing a sequence of conditional vector IF statements'1997 5,598,547'Vector processor having functional unit paths of differing pipeline lengths'1997 5,544,337'Vector processor having registers for control by vector resisters'1996 5,524,255'Method and apparatus for accessing global registers in a multiprocessor system'1996 5,499,356'Method and apparatus for a multiprocessor resource lockout instruction'1996 5,430,884'Scalar/vector processor'1995 5,381,536'Method and apparatus for separate mark and wait instructions for processors having multiple memory ports'1995 5,239,629'Dedicated centralized signaling mechanism for selectively signaling devices in a multiprocessor system'1993 5,208,914'Method and apparatus for non-sequential resource access'1993 5,193,187'Fast interrupt mechanism for interrupting processors in parallel in a multiprocessor system wherein processors are assigned process ID numbers'1993 5,175,862'Method and apparatus for a special purpose arithmetic boolean unit'1992 5,168,570'Method and apparatus for a multiple request toggling priority system'1992 5,165,038'Global registers for a multiprocessor system'1992 4,837,730'Linking scalar results directly to scalar operation inputs on a bidirectional databus in a computer which superpositions vector and scalar operations'1989 4,760,518'Bi-directional databus system for supporting superposition of vector and scalar operations in a computer'1988 4,538,241'Address translation buffer'1985 4,532,606'Content addressable memory cell with shift capability'1985 4,512,018'Shifter circuit'1985

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1985–1989Based in San Diego, CA, US· patent location history

1992–1993Patents assigned to SUPERCOMPUTER SYSTEMS LTD (5)· patent assignee history

1992–1998Based in Eau Claire, WI, US· patent location history

1995–1998Patents assigned to CRAY RESEARCH INC (12)· patent assignee history

1999–2007Patents assigned to SUN MICROSYSTEMS INC (16)· patent assignee history

1999–2011Based in Encinitas, CA, US· patent location history

2014–2018Patents assigned to GOOGLE INC (9)· patent assignee history

2014–2021Based in Middleton, WI, US· patent location history

2018–2021Patents assigned to GOOGLE LLC (25)· patent assignee history

2021Based in Allison Park, PA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
GOOGLE LLC	25	2018–2021
SUN MICROSYSTEMS INC	16	1999–2007
CRAY RESEARCH INC	12	1995–1998
GOOGLE INC	9	2014–2018
SUPERCOMPUTER SYSTEMS LTD	5	1992–1993

Locations

Location	Patents	Span
Middleton, WI, US	31	2014–2021
Eau Claire, WI, US	18	1992–1998
Encinitas, California, US	17	1999–2011
San Diego, California, US	5	1985–1989
Allison Park, Pennsylvania, US	1	2021