Inventor
Etsushi Adachi
Inventor
Hyogo, JP
Overview
Patents· 14 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1033%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1033%
B32BLayered products, i.e. products built-up of strata of flat or non-flat, e.g. cellular or honeycomb, form7%
C08GMacromolecular compounds obtained otherwise than by reactions only involving unsaturated carbon-to-carbon bonds4%
C08LCompositions of macromolecular compounds4%
C09DCoating compositions, e.g. paints, varnishes or lacquers4%
C23CCoating metallic material4%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices4%
H01JElectric discharge tubes or discharge lamps4%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests4%
PatentTitleYear
6,565,401'Cathode ray tube manufacturing method and cathode ray tube manufacturing system'20035,889,330'Semiconductor device whose flattening resin film component has a controlled carbon atom content'19995,728,630'Method of making a semiconductor device'19985,604,380'Semiconductor device having a multilayer interconnection structure'19975,600,151'Semiconductor device comprising a semiconductor substrate, an element formed thereon, and a stress-buffering film made of a silicone ladder resin'19975,510,653'Semiconductor device including silicon ladder resin layer'19965,306,947'Semiconductor device and manufacturing method thereof'19945,278,451'Semiconductor device sealed with mold resin'19945,183,846'Silicone ladder polymer coating composition'19935,180,691'Method of manufacturing a semiconductor device sealed with molding resin employing a stress buffering film of silicone'19935,087,553'Method for transferring patterns on silicone ladder type resin and etching solution used in such method'19925,081,202'High purity phenyl silicone ladder polymer and method for producing the same'19925,057,336'Method of forming high purity SiO.sub.2 thin film'19915,023,204'Method of manufacturing semiconductor device using silicone protective layer'1991Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1991–2003Patents assigned to MITSUBISHI ELECTRIC CORP (14)· patent assignee history
1991–1992Based in Amagasaki, JP· patent location history
1993–1999Based in Hyogo, JP· patent location history
2003Based in Tokyo, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MITSUBISHI ELECTRIC CORP | 14 | 1991–2003 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hyogo, JP | 9 | 1993–1999 |
| Amagasaki, JP | 4 | 1991–1992 |
| Tokyo, JP | 1 | 2003 |