Inventor
Eddy C. Huang
Inventor
San Jose, CA, US
Overview
Patents· 35 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Kprimary
H03KPulse technique47%
G06FElectric digital data processing31%
G11CStatic stores12%
G01RMeasuring electric variables6%
H10DInorganic electric semiconductor devices4%
PatentTitleYear
7,673,194'Apparatus and method for initializing an integrated circuit device and activating a function of the device once an input power supply has reached a threshold voltage'20107,482,835'Method and apparatus of memory clearing with monitoring RAM memory cells in a field programmable gated array'20097,426,665'Tileable field-programmable gate array architecture'20087,426,667'Apparatus and method for initializing an integrated circuit device and activating a function of the device once an input power supply has reached a threshold voltage'20087,342,416'Tileable field-programmable gate array architecture'20087,310,760'Apparatus and method for initializing an integrated circuit device and activating a function of the device once an input power supply has reached a threshold voltage'20077,157,938'Tileable field-programmable gate array architecture'20077,137,095'Freeway routing system for a gate array'20067,126,856'Method and apparatus of memory clearing with monitoring RAM memory cells in a field programmable gated array'20067,015,719'Tileable field-programmable gate array architecture'20066,937,063'Method and apparatus of memory clearing with monitoring RAM memory cells in a field programmable gated array'20056,888,375'Tileable field-programmable gate array architecture'20056,870,396'Tileable field-programmable gate array architecture'20056,744,278'Tileable field-programmable gate array architecture'20046,731,133'Routing structures for a tileable field-programmable gate array architecture'20046,700,404'Tileable field-programmable gate array architecture'20046,611,153'Tileable field-programmable gate array architecture'20036,531,891'Method and apparatus of memory clearing with monitoring memory cells'20036,504,398'Integrated circuit that includes a field-programmable gate array and a hard gate array having the same underlying structure'20036,476,636'Tileable field-programmable gate array architecture'20026,446,242'Method and apparatus for storing a validation number in a field-programmable gate array'20026,301,696'Final design method of a programmable logic device that is based on an initial design that consists of a partial underlying physical template'20016,211,697'Integrated circuit that includes a field-programmable gate array and a hard gate array having the same underlying structure'20016,205,515'Column redundancy circuitry with reduced time delay'20016,111,813'Apparatus and method for tracking dynamic sense amplifier enable signals with memory array accessing signals in a synchronous RAM'20006,098,145'Pulsed Y-decoders for improving bitline precharging in memories'20005,936,449'Dynamic CMOS register with a self-tracking clock'19995,872,467'Dynamic comparator with improved pre-charge/set-up time'19995,226,007'Automatic shutoff for memory load device during write operation'19935,206,545'Method and apparatus for providing output contention relief for digital buffers'19935,150,187'Input protection circuit for CMOS devices'19925,121,014'CMOS delay circuit with controllable delay'19925,034,687'Signature indicating circuit'19914,908,528'Input circuit having improved noise immunity'19904,609,838'Programmable array combinatorial (PAC) circuitry'1986Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1986–1993Patents assigned to VLSI TECHNOLOGY INC (7)· patent assignee history
1986–2010Based in San Jose, CA, US· patent location history
1999–2000Patents assigned to WINBOND ELECTRONICS CORP (4)· patent assignee history
2001–2010Patents assigned to ACTEL CORP (21)· patent assignee history
2001Patents assigned to ACTEL (1)· patent assignee history
2007Patents assigned to CHAN STEPHEN (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| ACTEL CORP | 21 | 2001–2010 |
| VLSI TECHNOLOGY INC | 7 | 1986–1993 |
| WINBOND ELECTRONICS CORP | 4 | 1999–2000 |
| ACTEL | 1 | 2001 |
| CHAN STEPHEN | 1 | 2007 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 35 | 1986–2010 |