Inventor

Frank D. Egitto

Inventor

Binghamton, NY, US

Overview

1983–2016

Patent span

Electricity

Primary field (CPC H)

Patents· 88 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H05Kprimary

H05KPrinted circuits27%

Y10TTechnical subjects covered by former us classification19%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1016%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h105%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests4%

C08JWorking-up4%

C23CCoating metallic material3%

B29CShaping or joining of plastics2%

B32BLayered products, i.e. products built-up of strata of flat or non-flat, e.g. cellular or honeycomb, form2%

C08LCompositions of macromolecular compounds2%

PatentTitleYear

9,351,408'Coreless layer buildup structure with LGA and joining layer'2016 8,607,445'Substrate having internal capacitor and method of making same'2013 8,558,374'Electronic package with thermal interposer and method of making same'2013 8,541,687'Coreless layer buildup structure'2013 8,536,459'Coreless layer buildup structure with LGA'2013 8,501,575'Method of forming multilayer capacitors in a printed circuit substrate'2013 8,499,445'Method of forming an electrically conductive printed line'2013 8,405,229'Electronic package including high density interposer and circuitized substrate assembly utilizing same'2013 8,245,392'Method of making high density interposer and electronic package utilizing same'2012 8,240,027'Method of making circuitized substrates having film resistors as part thereof'2012 8,240,031'Method of joining a semiconductor device/chip to a printed wiring board'2012 8,198,739'Semi-conductor chip with compressible contact structure and electronic package utilizing same'2012 7,981,245'Multi-layered interconnect structure using liquid crystalline polymer dielectric'2011 7,897,877'Capacitive substrate'2011 7,875,811'High speed interposer'2011 7,823,274'Method of making multilayered circuitized substrate assembly'2010 7,803,688'Capacitive substrate and method of making same'2010 7,800,916'Circuitized substrate with internal stacked semiconductor chips, method of making same, electrical assembly utilizing same and information handling system utilizing same'2010 7,777,136'Multi-layered interconnect structure using liquid crystalline polymer dielectric'2010 7,738,249'Circuitized substrate with internal cooling structure and electrical assembly utilizing same'2010 7,679,005'Circuitized substrate with shielded signal lines and plated-thru-holes and method of making same, and electrical assembly and information handling system utilizing same'2010 7,629,541'High speed interposer'2009 7,596,862'Method of making a circuitized substrate'2009 7,511,518'Method of making an interposer'2009 7,501,839'Interposer and test assembly for testing electronic devices'2009 7,342,183'Circuitized substrate with sintered paste connections, multilayered substrate assembly, electrical assembly and information handling system utilizing same'2008 7,334,323'Method of making mutilayered circuitized substrate assembly having sintered paste connections'2008 7,325,299'Method of making a circuitized substrate'2008 7,309,529'Structure and method for improved adhesion between two polymer films'2007 7,307,022'Method of treating conductive layer for use in a circuitized substrate and method of making said substrate having said conductive layer as part thereof'2007 7,301,108'Multi-layered interconnect structure using liquid crystalline polymer dielectric'2007 7,292,055'Interposer for use with test apparatus'2007 7,185,428'Method of making a circuitized substrate'2007 7,084,509'Electronic package with filled blinds vias'2006 7,083,901'Joining member for Z-interconnect in electronic devices without conductive paste'2006 7,067,193'Structure and method for improved adhesion between two polymer films'2006 7,045,897'Electrical assembly with internal memory circuitized substrate having electronic components positioned thereon, method of making same, and information handling system utilizing same'2006 7,011,531'Membrane probe with anchored elements'2006 6,955,849'Method and structure for small pitch z-axis electrical interconnections'2005 6,924,224'Method of forming filled blind vias'2005 6,905,589'Circuitized substrate and method of making same'2005 6,881,072'Membrane probe with anchored elements'2005 6,826,830'Multi-layered interconnect structure using liquid crystalline polymer dielectric'2004 6,822,332'Fine line circuitization'2004 6,790,305'Method and structure for small pitch z-axis electrical interconnections'2004 6,770,968'Method for bonding heat sinks to overmolds and device formed thereby'2004 6,719,871'Method for bonding heat sinks to overmolds and device formed thereby'2004 6,656,313'Structure and method for improved adhesion between two polymer films'2003 6,613,184'Stable interfaces between electrically conductive adhesives and metals'2003 6,607,613'Solder ball with chemically and mechanically enhanced surface properties'2003 6,576,996'Method for bonding heat sinks to overmolds and device formed thereby'2003 6,576,549'Fabrication of a metalized blind via'2003 6,522,014'Fabrication of a metalized blind via'2003 6,518,516'Multilayered laminate'2003 6,509,546'Laser excision of laminate chip carriers'2003 6,348,738'Flip chip assembly'2002 6,337,004'High adhesion performance roll sputtered strike layer'2002 6,306,683'Method of forming a flip chip assembly, and a flip chip assembly formed by the method'2001 6,284,329'Method of forming adherent metal components on a polyimide substrate'2001 6,265,462'Method for Producing a Diffusion Barrier and Polymeric Article Having a Diffusion Barrier'2001 6,250,540'Fluxless joining process for enriched solders'2001 6,252,012'Method for producing a diffusion barrier and polymeric article having a diffusion barrier'2001 6,232,363'Method for producing a diffusion barrier and polymeric article having a diffusion barrier'2001 6,210,547'Enhanced solder surface and process for chemically and mechanically enhancing solder surface properties'2001 6,206,997'Method for bonding heat sinks to overmolds and device formed thereby'2001 6,204,305'Method for producing a diffusion barrier and polymeric article having a diffusion barrier'2001 6,203,652'Method of forming a via in a substrate'2001 6,194,076'Method of forming adherent metal components on a polyimide substrate'2001 6,156,484'Gray scale etching for thin flexible interposer'2000 6,074,895'Method of forming a flip chip assembly'2000 6,056,831'Process for chemically and mechanically enhancing solder surface properties'2000 6,000,130'Process for making planar redistribution structure'1999 5,958,996'Method for producing a diffusion barrier and polymeric article having a diffusion barrier'1999 5,789,121'High density template: materials and processes for the application of conductive pastes'1998 5,774,340'Planar redistribution structure and printed wiring device'1998 5,693,928'Method for producing a diffusion barrier and polymeric article having a diffusion barrier'1997 5,626,771'Design of high density structures with laser etch stop'1997 5,536,579'Design of high density structures with laser etch stop'1996 5,460,921'High density pattern template: materials and processes for the application of conductive pastes'1995 5,461,203'Electronic package including lower water content polyimide film'1995 5,363,553'Method of drilling vias and through holes'1994 5,194,713'Removal of excimer laser debris using carbon dioxide laser'1993 5,110,409'Enhanced plasma etching'1992 4,985,112'Enhanced plasma etching'1991 4,869,777'Method for selectively etching the materials of a composite of two materials'1989 4,654,115'Process for removing contaminant'1987 4,412,885'Materials and methods for plasma etching of aluminum and aluminum alloys'1983 4,376,672'Materials and methods for plasma etching of oxides and nitrides of silicon'1983

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1983Based in Santa Clara, CA, US· patent location history

1987–2011Patents assigned to IBM (58)· patent assignee history

1987–2016Based in Binghamton, NY, US· patent location history

2003Based in Binghampton, NY, US· patent location history

2005–2013Patents assigned to ENDICOTT INTERCONNECT TECH INC (26)· patent assignee history

2012–2016Patents assigned to EGITTO FRANK D (11)· patent assignee history

2012–2016Patents assigned to DAS RABINDRA N (8)· patent assignee history

2012–2013Patents assigned to MARKOVICH VOYA R (6)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
IBM	58	1987–2011
ENDICOTT INTERCONNECT TECH INC	26	2005–2013
EGITTO FRANK Dself	11	2012–2016
DAS RABINDRA N	8	2012–2016
MARKOVICH VOYA R	6	2012–2013

Locations

Location	Patents	Span
Binghamton, New York, US	85	1987–2016
Santa Clara, California, US	2	1983
Binghampton, New York, US	1	2003