LexDanaLexDanabeta
Inventor

Yoshikazu Kasuya

Inventor
Sakata, JP

Overview

30→
Patents
2002–2021
Patent span
Electricity
Primary field (CPC H)

Patents· 30 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices23%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1020%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests18%
G06FElectric digital data processing16%
H10BElectronic memory devices10%
H01LSemiconductor devices8%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h102%
G11CStatic stores1%
H03HImpedance networks, e.g. resonant circuits1%
Y10TTechnical subjects covered by former us classification1%
PatentTitleYear
10,930,635Semiconductor device202110,679,979Semiconductor device202010,121,741Semiconductor device, method for manufacturing the same, method for generating mask data, mask and computer readable recording medium20189,978,737Semiconductor device, method for manufacturing the same, method for generating mask data, mask and computer readable recording medium20189,953,922Semiconductor device, method for manufacturing the same, method for generating mask data, mask and computer readable recording medium20189,455,223'Semiconductor device, method for manufacturing the same, method for generating mask data, mask and computer readable recording medium'20168,984,466'Semiconductor device, method for manufacturing the same, method for generating mask data, mask and computer readable recording medium'20158,637,950'Semiconductor device, method for manufacturing the same, method for generating mask data, mask and computer readable recording medium'20148,418,114'Semiconductor device, method for manufacturing the same, method for generating mask data, mask and computer readable recording medium'20138,214,776'Semiconductor device, method for manufacturing the same, method for generating mask data, mask and computer readable recording medium'20127,977,233'Semiconductor device, method for manufacturing the same, method for generating mask data, mask and computer readable recording medium'20117,802,224'Semiconductor device, method for manufacturing the same, method for generating mask data, mask and computer readable recording medium'20107,484,280'Method for manufacturing a surface acoustic wave element having an interdigital transducer (IDT) electrode'20097,271,490'Semiconductor device having dummy wiring layers and a method for manufacturing the same'20077,015,542'MONOS memory device'20066,953,967'Semiconductor device and method of manufacturing the same'20056,930,000'Method of manufacturing semiconductor device'20056,888,250'Semiconductor device, method for manufacturing the same, method for generating mask data, mask and computer readable recording medium'20056,815,291'Method of manufacturing semiconductor device'20046,798,015'Semiconductor device and method of manufacturing the same'20046,784,078'Methods for manufacturing semiconductor devices and semiconductor devices'20046,762,102'Methods for manufacturing semiconductor devices and semiconductor devices'20046,753,215'Methods for manufacturing semiconductor devices and semiconductor devices'20046,706,579'Method of manufacturing semiconductor device'20046,664,155'Method of manufacturing semiconductor device with memory area and logic circuit area'20036,605,852'Semiconductor device and method for manufacturing the same including forming a plurality of dummy convex regions on a matrix with a virtual linear line defining an angle'20036,560,765'Method for generating mask data, mask and computer readable recording media'20036,528,414'Methods for forming wiring line structures in semiconductor devices'20036,437,455'Semiconductor device having gate-gate, drain-drain, and drain-gate connecting layers and method of fabricating the same'20026,404,023'Semiconductor device having gate-gate, drain-drain, and drain-gate connecting layers and method of fabricating the same'2002

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2002–2021Patents assigned to SEIKO EPSON CORP (30)· patent assignee history
2002–2021Based in Sakata, JP· patent location history
2002Based in Sukato, JP· patent location history
2003–2004Based in Sakutu, JP· patent location history
2004Based in Sakuta, JP· patent location history
2007Based in Suwa, JP· patent location history
2012–2013Patents assigned to KASUYA YOSHIKAZU (2)· patent assignee history
2012–2013Patents assigned to KAWAHARA KEI (2)· patent assignee history
2012–2013Patents assigned to MORI KATSUMI (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SEIKO EPSON CORP302002–2021
KASUYA YOSHIKAZUself22012–2013
KAWAHARA KEI22012–2013
MORI KATSUMI22012–2013
Locations
LocationPatentsSpan
Sakata, JP252002–2021
Sakutu, JP22003–2004
Suwa, JP12007
Sakuta, JP12004
Sukato, JP12002