Inventor
Gary H. Bernstein
Inventor
Granger, IN, US
Overview
Patents· 18 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices15%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1015%
H05KPrinted circuits12%
Y02PClimate change mitigation technologies in the production or processing of goods12%
H01LSemiconductor devices10%
B82YSpecific uses or applications of nanostructures6%
G02BOptical elements, systems or apparatus6%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices4%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h104%
A61BDiagnosis2%
PatentTitleYear
10,613,129Methods and apparatus for spin wave-based spectrum analyzers202010,410,989Inter-chip alignment201910,050,027Quilt packaging system with mated metal interconnect nodules and voids20189,690,064'Multi-gang cassette system'20179,633,976'Systems and methods for inter-chip communication'20179,620,473'Quilt packaging system with interdigitated interconnecting nodules for inter-chip alignment'20179,577,173'Mono-metallic thermocouples'20178,623,700'Inter-chip communication'20148,058,906'Non-majority MQCA magnetic logic gates and arrays based on misaligned magnetic islands'20118,021,965'Inter-chip communication'20117,612,443'Inter-chip communication'20097,608,919'Interconnect packaging systems'20096,594,894'Planar-processing compatible metallic micro-extrusion process'20036,364,889'Electronic lancing device'20024,962,410'QUADFET-A novel field effect transistor'19904,937,174'Process of obtaining improved contrast in electron beam lithography'19904,877,716'Developer solutions for PMMA electron resist'19894,872,038'Lateral surface superlattice having negative differential conductivity novel process for producing same'1989Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1989–1990Patents assigned to UNIV ARIZONA (4)· patent assignee history
1989–1990Based in Tempe, AZ, US· patent location history
1990–2020Based in South Bend, IN, US· patent location history
2002–2019Based in Granger, IN, US· patent location history
2009–2020Patents assigned to UNIV NOTRE DAME DU LAC (10)· patent assignee history
2011–2014Patents assigned to BERNSTEIN GARY H (2)· patent assignee history
2011–2014Patents assigned to POROD WOLFGANG (2)· patent assignee history
2017–2019Patents assigned to INDIANA INTEGRATED CIRCUITS LLC (3)· patent assignee history
2017Based in Bothell, WA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| UNIV NOTRE DAME DU LAC | 10 | 2009–2020 |
| UNIV ARIZONA | 4 | 1989–1990 |
| INDIANA INTEGRATED CIRCUITS LLC | 3 | 2017–2019 |
| BERNSTEIN GARY Hself | 2 | 2011–2014 |
| POROD WOLFGANG | 2 | 2011–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Granger, IN, US | 12 | 2002–2019 |
| Tempe, AZ, US | 3 | 1989–1990 |
| South Bend, IN, US | 2 | 1990–2020 |
| Bothell, Washington, US | 1 | 2017 |