Inventor

Joong S. Jeon

Inventor
Cupertino, CA, US

Overview

46→
Patents
2001–2016
Patent span
Electricity
Primary field (CPC H)

Patents· 46 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices48%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1019%
H10BElectronic memory devices11%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests5%
C23CCoating metallic material4%
G11CStatic stores4%
H10NElectric solid-state devices not otherwise provided for3%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%
B82YSpecific uses or applications of nanostructures1%
H01LSemiconductor devices1%
PatentTitleYear
9,318,573'Field effect transistor having germanium nanorod and method of manufacturing the same'20168,809,936'Memory cell system with multiple nitride layers'20148,460,990'CMOS transistor using germanium condensation and method of fabricating the same'20138,232,613'Germanium silicide layer including vanadium, platinum, and nickel'20128,193,030'Methods of fabricating non-volatile memory devices having carbon nanotube layer and passivation layer'20128,115,264'Semiconductor device having a metal gate with a low sheet resistance and method of fabricating metal gate of the same'20127,902,011'Method of fabricating Schottky barrier transistor'20117,884,410'Nonvolatile memory devices and methods of fabricating the same'20117,863,142'Method of forming a germanium silicide layer, semiconductor device including the germanium silicide layer, and method of manufacturing the semiconductor device'20117,863,175'Zero interface polysilicon to polysilicon gate for flash memory'20117,863,128'Non-volatile memory device with improved erase speed'20117,800,186'Semiconductor device and method of fabricating metal gate of the same'20107,674,665'Method of fabricating Schottky barrier transistor'20107,468,296'Thin film germanium diode with low reverse breakdown'20087,446,369'SONOS memory cell having high-K dielectric'20087,365,389'Memory cell having enhanced high-K dielectric'20087,294,547'SONOS memory cell having a graded high-K dielectric'20077,232,724'Radical oxidation for bitline oxide of SONOS'20077,196,008'Aluminum oxide as liner or cover layer to spacers in memory device'20077,176,531'CMOS gates formed by integrating metals having different work functions and having a high-k gate dielectric'20077,071,051'Method for forming a thin, high quality buffer layer in a field effect transistor and related structure'20067,033,894'Method for modulating flatband voltage of devices having high-k gate dielectrics by post-deposition annealing'20067,026,211'Semiconductor component and method of manufacture'20066,991,990'Method for forming a field effect transistor having a high-k gate dielectric'20066,992,370'Memory cell structure having nitride layer with reduced charge loss and method for fabricating same'20066,905,971'Treatment of dielectric material to enhance etch rate'20056,902,977'Method for forming polysilicon gate on high-k dielectric and related structure'20056,872,613'Method for integrating metals having different work functions to form CMOS gates having a high-k gate dielectric and related structure'20056,849,925'Preparation of composite high-K/standard-K dielectrics for semiconductor devices'20056,797,572'Method for forming a field effect transistor having a high-k gate dielectric and related structure'20046,790,755'Preparation of stack high-K gate dielectrics with nitrided layer'20046,764,898'Implantation into high-K dielectric material after gate etch to facilitate removal'20046,762,454'Stacked polysilicon layer for boron penetration inhibition'20046,759,346'Method of forming dielectric layers'20046,693,004'Interfacial barrier layer in semiconductor devices with high-K gate dielectric material'20046,645,882'Preparation of composite high-K/standard-K dielectrics for semiconductor devices'20036,621,114'MOS transistors with high-k dielectric gate insulator for reducing remote scattering'20036,620,671'Method of fabricating transistor having a single crystalline gate conductor'20036,607,973'Preparation of high-k nitride silicate layers by cyclic molecular layer deposition'20036,586,349'Integrated process for fabrication of graded composite dielectric material layers for semiconductor devices'20036,562,491'Preparation of composite high-K dielectrics'20036,559,014'Preparation of composite high-K / standard-K dielectrics for semiconductor devices'20036,451,641'Non-reducing process for deposition of polysilicon gate electrode over high-K gate dielectric material'20026,448,127'Process for formation of ultra-thin base oxide in high k/oxide stack gate dielectrics of mosfets'20026,376,323'Fabrication of gate of P-channel field effect transistor with added implantation before patterning of the gate'20026,187,657'Dual material gate MOSFET technique'2001

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2001–2008Patents assigned to ADVANCED MICRO DEVICES INC (30)· patent assignee history
2001–2011Based in Cupertino, CA, US· patent location history
2007–2014Patents assigned to SPANSION LLC (8)· patent assignee history
2010–2016Patents assigned to SAMSUNG ELECTRONICS CO LTD (10)· patent assignee history
2010–2016Based in Seongnam-si, KR· patent location history
2010–2011Based in Yongin-si, KR· patent location history
2011–2014Patents assigned to GLOBALFOUNDRIES INC (3)· patent assignee history
2011–2014Based in Los Altos, CA, US· patent location history
2012–2013Patents assigned to JEON JOONG S (4)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
ADVANCED MICRO DEVICES INC302001–2008
SAMSUNG ELECTRONICS CO LTD102010–2016
SPANSION LLC82007–2014
JEON JOONG Sself42012–2013
GLOBALFOUNDRIES INC32011–2014
Locations
LocationPatentsSpan
Cupertino, California, US342001–2011
Seongnam-si, KR82010–2016
Los Altos, California, US22011–2014
Yongin-si, KR22010–2011