Inventor
Mihaela Balseanu
Inventor
Sunnyvale, CA, US
Overview
Patents· 48 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1033%
C23CCoating metallic material19%
H01LSemiconductor devices15%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1012%
H10DInorganic electric semiconductor devices11%
H10BElectronic memory devices2%
B81CProcesses or apparatus specially adapted for the manufacture or treatment of microstructural devices or systems2%
B82YSpecific uses or applications of nanostructures2%
G05BControl or regulating systems in general2%
B32BLayered products, i.e. products built-up of strata of flat or non-flat, e.g. cellular or honeycomb, form1%
PatentTitleYear
11,133,178Seamless gapfill with dielectric ALD films202111,028,478Atomic layer deposition of films comprising silicon, carbon and nitrogen using halogenated silicon precursors202111,017,997Methods and apparatus for low temperature silicon nitride films202110,957,532Method and apparatus for deposition of low-k films202110,923,396Method of forming self-aligned via202110,714,331Method to fabricate thermally stable low K-FinFET spacer202010,700,072Cap layer for bit line resistance reduction202010,629,484Method of forming self-aligned via202010,453,678Method and apparatus for deposition of low-k films201910,319,583Selective deposition of silicon nitride films for spacer applications201910,170,298High temperature silicon oxide atomic layer deposition technology201910,147,599Methods for depositing low K and low wet etch rate dielectric thin films201810,134,581Methods and apparatus for selective dry etch201810,023,958Atomic layer deposition of films comprising silicon, carbon and nitrogen using halogenated silicon precursors20189,984,868PEALD of films comprising silicon nitride20189,875,888High temperature silicon oxide atomic layer deposition technology20189,799,511'Methods for depositing low k and low wet etch rate dielectric thin films'20179,748,093'Pulsed nitride encapsulation'20179,633,861'Cu/barrier interface enhancement'20179,564,582'Method of forming magnetic tunneling junctions'20179,297,073'Accurate film thickness control in gap-fill technology'20168,758,638'Copper oxide removal techniques'20148,753,989'Method to increase tensile stress of silicon nitride films using a post PECVD deposition UV cure'20148,598,020'Plasma-enhanced chemical vapor deposition of crystalline germanium'20138,586,487'Low temperature plasma enhanced chemical vapor deposition of conformal silicon carbon nitride and silicon nitride films'20138,563,090'Boron film interface engineering'20138,536,069'Multilayered low k cap with conformal gap fill and UV stable compressive stress properties'20138,501,568'Method of forming flash memory with ultraviolet treatment'20138,492,880'Multilayered low k cap with conformal gap fill and UV stable compressive stress properties'20138,337,950'Method for depositing boron-rich films for lithographic mask applications'20128,252,653'Method of forming a non-volatile memory having a silicon nitride charge trap layer'20128,148,269'Boron nitride and boron-nitride derived materials deposition method'20128,138,104'Method to increase silicon nitride tensile stress using nitrogen plasma in-situ treatment and ex-situ UV cure'20128,129,290'Method to increase tensile stress of silicon nitride films using a post PECVD deposition UV cure'20128,084,105'Method of depositing boron nitride and boron nitride-derived materials'20117,923,386'Method to improve the step coverage and pattern loading for dielectric films'20117,910,491'Gapfill improvement with low etch rate dielectric liners'20117,879,683'Methods and apparatus of creating airgap in dielectric layers for the reduction of RC delay'20117,871,926'Methods and systems for forming at least one dielectric layer'20117,816,205'Method of forming non-volatile memory having charge trap layer with compositional gradient'20107,790,635'Method to increase the compressive stress of PECVD dielectric films'20107,780,865'Method to improve the step coverage and pattern loading for dielectric films'20107,732,342'Method to increase the compressive stress of PECVD silicon nitride films'20107,704,816'Boron derived materials deposition method'20107,615,788'Method for monolithically integrating silicon carbide microelectromechanical devices with electronic circuitry'20097,601,651'Method to improve the step coverage and pattern loading for dielectric films'20097,566,655'Integration process for fabricating stressed transistor structure'20097,170,141'Method for monolithically integrating silicon carbide microelectromechanical devices with electronic circuitry'2007Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2007–2009Based in Ithaca, NY, US· patent location history
2009–2021Patents assigned to APPLIED MATERIALS INC (46)· patent assignee history
2009–2021Based in Sunnyvale, CA, US· patent location history
2011–2018Patents assigned to BALSEANU MIHAELA (15)· patent assignee history
2011–2014Patents assigned to XIA LI-QUN (14)· patent assignee history
2011–2018Patents assigned to WITTY DEREK R (11)· patent assignee history
2012–2018Patents assigned to NGUYEN VICTOR (7)· patent assignee history
2013–2020Based in Cupertino, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| APPLIED MATERIALS INC | 46 | 2009–2021 |
| BALSEANU MIHAELAself | 15 | 2011–2018 |
| XIA LI-QUN | 14 | 2011–2014 |
| WITTY DEREK R | 11 | 2011–2018 |
| NGUYEN VICTOR | 7 | 2012–2018 |
Locations
| Location | Patents | Span |
|---|---|---|
| Sunnyvale, California, US | 40 | 2009–2021 |
| Cupertino, California, US | 6 | 2013–2020 |
| Ithaca, New York, US | 2 | 2007–2009 |