LexDanaLexDanabeta
Inventor

Eun-Jung Yun

Inventor
Seoul, KR

Overview

47→
Patents
2005–2014
Patent span
Electricity
Primary field (CPC H)

Patents· 47 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices37%
H10BElectronic memory devices19%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1017%
G11CStatic stores10%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h106%
B82YSpecific uses or applications of nanostructures5%
H01HElectric switches3%
A01KAnimal husbandry1%
H01LSemiconductor devices1%
Y10TTechnical subjects covered by former us classification1%
PatentTitleYear
8,835,993'Gate-all-around integrated circuit devices'20148,222,067'Method of manufacturing multibit electro-mechanical memory device having movable electrode'20128,198,704'Semiconductor device including a crystal semiconductor layer'20128,179,711'Semiconductor memory device with stacked memory cell and method of manufacturing the stacked memory cell'20128,168,492'Field effect transistors with vertically oriented gate electrodes and methods for fabricating the same'20128,129,777'Semiconductor device having a multi-channel type MOS transistor'20128,129,800'Gate-all-around integrated circuit devices'20127,972,914'Semiconductor device with FinFET and method of fabricating the same'20117,973,343'Multibit electro-mechanical memory device having cantilever electrodes'20117,943,998'Nonvolatile memory devices having stacked structures and methods of fabricating the same'20117,911,011'Methods of fabricating electromechanical non-volatile memory devices'20117,897,463'Methods of fabricating vertical twin-channel transistors'20117,851,287'Method of fabricating Schottky barrier FinFET device'20107,821,821'Multibit electro-mechanical device and method of manufacturing the same'20107,803,697'Highly integrated semiconductor device and method of fabricating the same'20107,800,172'Methods of forming semiconductor devices having multiple channel MOS transistors and related intermediate structures'20107,791,936'Multibit electro-mechanical memory device and method of manufacturing the same'20107,790,494'Method of fabricating a multi-bit electro-mechanical memory device'20107,781,290'Complementary metal-oxide semiconductor (CMOS) devices including a thin-body channel and dual gate dielectric layers and methods of manufacturing the same'20107,768,070'Semiconductor devices having field effect transistors'20107,723,762'Schottky barrier FinFET device and fabrication method thereof'20107,719,068'Multi-bit electro-mechanical memory device and method of manufacturing the same'20107,709,356'Methods of forming a pattern and methods of manufacturing a memory device using the same'20107,696,032'Semiconductor device including a crystal semiconductor layer, its fabrication and its operation'20107,696,046'Method of manufacturing a semiconductor device having a multi-channel type MOS transistor'20107,675,142'Electromechanical non-volatile memory devices'20107,662,720'3-Dimensional flash memory device and method of fabricating the same'20107,541,645'Metal oxide semiconductor (MOS) transistors having buffer regions below source and drain regions'20097,511,998'Non-volatile memory device and method of fabricating the same'20097,482,649'Multi-bit nonvolatile memory devices'20097,473,963'Metal oxide semiconductor (MOS) transistors having three dimensional channels'20097,453,716'Semiconductor memory device with stacked control transistors'20087,442,987'Non-volatile memory devices including divided charge storage structures'20087,402,483'Methods of forming a multi-bridge-channel MOSFET'20087,382,018'3-Dimensional flash memory device and method of fabricating the same'20087,348,246'Methods of fabricating non-volatile memory devices including divided charge storage structures'20087,316,968'Methods of forming semiconductor devices having multiple channel MOS transistors'20087,285,466'Methods of forming metal oxide semiconductor (MOS) transistors having three dimensional channels'20077,285,456'Method of fabricating a fin field effect transistor having a plurality of protruding channels'20077,265,418'Semiconductor devices having field effect transistors'20077,253,060'Gate-all-around type of semiconductor device and method of fabricating the same'20077,187,022'Semiconductor device having a multi-bridge-channel and method for fabricating the same'20077,129,541'Field effect transistors including vertically oriented gate electrodes extending inside vertically protruding portions of a substrate'20067,122,431'Methods of fabrication metal oxide semiconductor (MOS) transistors having buffer regions below source and drain regions'20067,037,768'Methods of etching intermediate silicon germanium layers using ion implantation to promote selectivity'20066,914,316'Semiconductor trench isolation structure'20056,881,637'Method of forming a gate electrode, method of manufacturing a semiconductor device having the gate electrode, and method of oxidizing a substrate'2005

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2005–2014Patents assigned to SAMSUNG ELECTRONICS CO LTD (47)· patent assignee history
2005–2014Based in Seoul, KR· patent location history
2007Based in Yongin-si, KR· patent location history
2012–2014Patents assigned to KIM SUNG-MIN (7)· patent assignee history
2012–2014Patents assigned to YUN EUN-JUNG (7)· patent assignee history
2012–2014Patents assigned to KIM MIN-SANG (5)· patent assignee history
2012–2014Patents assigned to LEE SUNG-YOUNG (4)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
SAMSUNG ELECTRONICS CO LTD472005–2014
KIM SUNG-MIN72012–2014
YUN EUN-JUNGself72012–2014
KIM MIN-SANG52012–2014
LEE SUNG-YOUNG42012–2014
Locations
LocationPatentsSpan
Seoul, KR462005–2014
Yongin-si, KR12007