Inventor
Keith R. Cook
Inventor
Boise, ID, US
Overview
Patents· 17 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1029%
H10DInorganic electric semiconductor devices15%
H10BElectronic memory devices12%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1012%
B60SServicing, cleaning, repairing, supporting, lifting, or manoeuvring of vehicles, not otherwise provided for9%
H01LSemiconductor devices6%
B60GVehicle suspension arrangements3%
E05BLocks3%
E05FDevices for moving wings into open or closed position3%
E05YIndexing scheme associated with subclasses e05d and e05f, relating to construction elements, electric control, power supply, power signal or transmission, user interfaces, mounting or coupling, details, accessories, auxiliary operations not otherwise provided for, application thereof3%
PatentTitleYear
10,128,142Semiconductor structures including carrier wafers and attached device wafers, and methods of forming such semiconductor structures20189,472,518'Semiconductor structures including carrier wafers and methods of using such semiconductor structures'20168,349,699'Methods of forming trench isolation in the fabrication of integrated circuitry and methods of fabricating integrated circuitry'20138,012,847'Methods of forming trench isolation in the fabrication of integrated circuitry and methods of fabricating integrated circuitry'20117,939,948'Interconnect structures with bond-pads and methods of forming bump sites on bond-pads'20117,528,064'Interconnect structures with bond-pads and methods of forming bump sites on bond-pads'20097,488,664'Capacitor structure for two-transistor DRAM memory cell and method of forming same'20097,387,940'Methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating memory circuitry, integrated circuitry and memory integrated circuitry'20087,282,433'Interconnect structures with bond-pads and methods of forming bump sites on bond-pads'20076,653,241'Methods of forming protective segments of material, and etch stops'20036,620,734'Methods of forming protective segments of material, and etch stops'20035,642,026'Windshield wiper system having reduced wipe speed at reversal points using variable frequency induction motor control'19975,616,182'Method and apparatus for wiping a windshield'19974,850,466'Clutch for power door lock actuator'19894,633,153'Power window control with tape drive tension release'19864,398,704'Vehicle pneumatic suspension system with dead band adjustment'19834,355,270'Motor reversing circuit for vehicle windshield wiper'1982Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1982–1989Patents assigned to GEN MOTORS CORP (4)· patent assignee history
1982–1983Based in Xenia, OH, US· patent location history
1986–1997Based in Beavercreek, OH, US· patent location history
1997Patents assigned to ITT AUTOMOTIVE ELECTRICAL SYST (2)· patent assignee history
2003–2018Patents assigned to MICRON TECHNOLOGY INC (11)· patent assignee history
2003–2018Based in Boise, ID, US· patent location history
2013Patents assigned to COOK KEITH R (1)· patent assignee history
2013Patents assigned to PATRAW ROBERT D (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 11 | 2003–2018 |
| GEN MOTORS CORP | 4 | 1982–1989 |
| ITT AUTOMOTIVE ELECTRICAL SYST | 2 | 1997 |
| COOK KEITH Rself | 1 | 2013 |
| PATRAW ROBERT D | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Boise, ID, US | 11 | 2003–2018 |
| Beavercreek, OH, US | 4 | 1986–1997 |
| Xenia, OH, US | 2 | 1982–1983 |