Inventor

Kerry Christopher Imming

Inventor

Rochester, MN, US

Overview

19→

Patents

2001–2016

Patent span

Electricity

Primary field (CPC H)

Patents· 19 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H04Lprimary

H04LTransmission of digital information, e.g. telegraphic communication48%

G06FElectric digital data processing39%

G01RMeasuring electric variables4%

H03KPulse technique4%

H04WWireless communication networks4%

PatentTitleYear

9,396,077'Redundant location address mapper'2016 8,792,332'Implementing lane shuffle for fault-tolerant communication links'2014 8,643,421'Implementing low power, single master-slave elastic buffer'2014 8,493,842'Implementing exchange of failing lane information for fault-tolerant communication links'2013 8,213,428'Methods and apparatus for indexing memory of a network processor'2012 8,170,024'Implementing pointer and stake model for frame alteration code in a network processor'2012 7,757,006'Implementing conditional packet alterations based on transmit port'2010 7,660,908'Implementing virtual packet storage via packet work area'2010 7,650,555'Method and apparatus for characterizing components of a device under test using on-chip trace logic analyzer'2010 7,617,332'Method and apparatus for implementing packet command instructions for network processing'2009 7,475,161'Implementing conditional packet alterations based on transmit port'2009 7,330,478'Method, apparatus, and computer program product for implementing pointer and stake model for frame alteration code in a network processor'2008 7,248,595'Method, apparatus, and computer program product for implementing packet ordering'2007 7,089,387'Methods and apparatus for maintaining coherency in a multi-processor system'2006 7,058,839'Cached-counter arrangement in which off-chip counters are updated from on-chip counters'2006 6,996,650'Method and apparatus for implementing multiple configurable sub-busses of a point-to-point bus'2006 6,910,092'Chip to chip interface for interconnecting chips'2005 6,880,026'Method and apparatus for implementing chip-to-chip interconnect bus initialization'2005 6,260,089'Method and apparatus for implementing connections with circuits'2001

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2001–2014Patents assigned to IBM (18)· patent assignee history

2001–2016Based in Rochester, MN, US· patent location history

2012–2014Patents assigned to IMMING KERRY CHRISTOPHER (3)· patent assignee history

2012–2014Patents assigned to IRISH JOHN DAVID (2)· patent assignee history

2012Patents assigned to OZGUNER TOLGA (2)· patent assignee history

2013–2014Patents assigned to HECKENDORF RYAN ABEL (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
IBM	18	2001–2014
IMMING KERRY CHRISTOPHERself	3	2012–2014
HECKENDORF RYAN ABEL	2	2013–2014
IRISH JOHN DAVID	2	2012–2014
OZGUNER TOLGA	2	2012

Locations

Location	Patents	Span
Rochester, Minnesota, US	19	2001–2016