Inventor
Rao V. Annapragada
Inventor
San Jose, CA, US
Overview
Patents· 31 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1035%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1028%
C23CCoating metallic material6%
H01JElectric discharge tubes or discharge lamps6%
B24BMachines, devices, or processes for grinding or polishing4%
B24DTools for grinding, buffing or sharpening4%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices4%
B01JChemical or physical processes, e.g. catalysis or colloid chemistry1%
C23FNon-mechanical removal of metallic material from surface1%
G02BOptical elements, systems or apparatus1%
PatentTitleYear
9,660,177'Method to minimize MTJ sidewall damage and bottom electrode redeposition using IBE trimming'20178,801,947'Methods for forming microlenses'20147,534,363'Method for providing uniform removal of organic material'20097,323,116'Methods and apparatus for monitoring a process in a plasma processing system by measuring self-bias voltage'20087,202,177'Nitrous oxide stripping process for organosilicate glass'20077,129,171'Selective oxygen-free etching process for barrier materials'20067,081,407'Method of preventing damage to porous low-k materials during resist stripping'20066,916,697'Etch back process using nitrous oxide'20056,876,063'Method of improving adhesion of cap oxide to nanoporous silica for integrated circuit fabrication'20056,828,250'Process for etching vias in organosilicate glass materials without causing RIE lag'20046,777,344'Post-etch photoresist strip with O2 and NH3 for organosilicate glass low-K dielectric etch applications'20046,700,200'Reliable via structures having hydrophobic inner wall surfaces'20046,630,407'Plasma etching of organic antireflective coating'20036,543,459'Method of determining an end point for a remote microwave plasma cleaning system'20036,518,174'Combined resist strip and barrier etch process for dual damascene structures'20036,465,365'Method of improving adhesion of cap oxide to nanoporous silica for integrated circuit fabrication'20026,418,875'Method of improving adhesion of cap oxide to nanoporous silica for integrated circuit fabrication'20026,413,877'Method of preventing damage to organo-silicate-glass materials during resist stripping'20026,387,797'Method for reducing the capacitance between interconnects by forming voids in dielectric material'20026,380,092'Gas phase planarization process for semiconductor wafers'20026,303,192'Process to improve adhesion of PECVD cap layers in integrated circuits'20016,303,525'Method and structure for adhering MSQ material to liner oxide'20016,267,076'Gas phase planarization process for semiconductor wafers'20016,255,210'Semiconductor dielectric structure and method for making the same'20016,218,735'Process to improve adhesion of cap layers in intergrated circuits'20016,165,905'Methods for making reliable via structures having hydrophobic inner wall surfaces'20006,140,221'Method for forming vias through porous dielectric material and devices formed thereby'20006,057,245'Gas phase planarization process for semiconductor wafers'20006,048,494'Autoclave with improved heating and access'20006,028,013'Moisture repellant integrated circuit dielectric material combination'20006,001,747'Process to improve adhesion of cap layers in integrated circuits'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2002Patents assigned to VLSI TECHNOLOGY INC (6)· patent assignee history
1999–2005Based in San Jose, CA, US· patent location history
2000–2001Patents assigned to PHILIPS ELECTRONICS NA (3)· patent assignee history
2001–2002Patents assigned to PHILIPS ELECTRONICS NO AMERICA (2)· patent assignee history
2002–2009Patents assigned to LAM RES CORP (11)· patent assignee history
2002–2005Patents assigned to KONINKL PHILIPS ELECTRONICS NV (5)· patent assignee history
2002–2017Based in Union City, CA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| LAM RES CORP | 11 | 2002–2009 |
| VLSI TECHNOLOGY INC | 6 | 1999–2002 |
| KONINKL PHILIPS ELECTRONICS NV | 5 | 2002–2005 |
| PHILIPS ELECTRONICS NA | 3 | 2000–2001 |
| PHILIPS ELECTRONICS NO AMERICA | 2 | 2001–2002 |
Locations
| Location | Patents | Span |
|---|---|---|
| San Jose, California, US | 18 | 1999–2005 |
| Union City, California, US | 13 | 2002–2017 |