Inventor
Bendik Kleveland
Inventor
Santa Clara, CA, US
Overview
Patents· 34 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores33%
H10BElectronic memory devices10%
H10DInorganic electric semiconductor devices10%
B82YSpecific uses or applications of nanostructures9%
G06FElectric digital data processing7%
H03KPulse technique5%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses5%
H04LTransmission of digital information, e.g. telegraphic communication5%
G05FSystems for regulating electric or magnetic variables3%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems3%
PatentTitleYear
9,361,196'Memory device with background built-in self-repair using background built-in self-testing'20169,037,928'Memory device with background built-in self-testing and background built-in self-repair'20158,219,778'Virtual memory interface'20127,978,448'Hybrid circuit for circuit protection and switching'20117,759,916'Regulator with device performance dynamic mode selection'20107,728,679'Calibration of voltage controlled oscillators'20107,603,244'Calibration of voltage controlled oscillators'20097,570,035'Voltage regulator with a hybrid control loop'20097,564,707'One-time programmable non-volatile memory'20097,482,888'Fast startup resonant element oscillator'20097,415,369'Calibration of voltage-controlled oscillators'20087,383,476'System architecture and method for three-dimensional memory'20087,219,271'Memory device and method for redundancy/self-repair'20077,212,454'Method and apparatus for programming a memory array'20077,180,949'High-speed chip-to-chip communication interface'20077,134,056'High-speed chip-to-chip communication interface with signal trace routing and phase offset detection'20067,057,958'Method and system for temperature compensation for memory cells with temperature-dependent behavior'20066,954,394'Integrated circuit and method for selecting a set of memory-cell-layer-dependent or temperature-dependent operating conditions'20056,894,936'Memory device and method for selectable sub-array activation'20056,816,410'Method for programming a three-dimensional memory array incorporating serial chain diode stack'20046,784,517'Three-dimensional memory array incorporating serial chain diode stack'20046,781,878'Dynamic sub-array group selection scheme'20046,767,816'Method for making a three-dimensional memory array incorporating serial chain diode stack'20046,754,102'Method for programming a three-dimensional memory array incorporating serial chain diode stack'20046,724,665'Memory device and method for selectable sub-array activation'20046,631,085'Three-dimensional memory array incorporating serial chain diode stack'20036,574,145'Memory device and method for sensing while programming a non-volatile memory cell'20036,567,304'Memory device and method for reliably reading multi-bit data from a write-many memory cell'20036,515,537'Integrated circuit current source with switched capacitor feedback'20036,515,904'Method and system for increasing programming bandwidth in a non-volatile memory device'20036,486,728'Multi-stage charge pump'20025,969,929'Distributed ESD protection device for high speed integrated circuits'19995,898,321'Method and apparatus for slew rate and impedance compensating buffer circuits'19995,528,168'Power saving terminated bus'1996Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1996Based in San Jose, CA, US· patent location history
1999–2003Based in Los Altos, CA, US· patent location history
1999Based in Palo Alto, CA, US· patent location history
2002–2005Patents assigned to MATRIX SEMICONDUCTOR INC (14)· patent assignee history
2003–2016Based in Santa Clara, CA, US· patent location history
2007–2008Patents assigned to SANDISK 3D LLC (3)· patent assignee history
2008–2015Patents assigned to KLEVELAND BENDIK (3)· patent assignee history
2009Patents assigned to ZEROG WIRELESS INC (4)· patent assignee history
2010–2012Patents assigned to MICROCHIP TECH INC (4)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MATRIX SEMICONDUCTOR INC | 14 | 2002–2005 |
| MICROCHIP TECH INC | 4 | 2010–2012 |
| ZEROG WIRELESS INC | 4 | 2009 |
| KLEVELAND BENDIKself | 3 | 2008–2015 |
| SANDISK 3D LLC | 3 | 2007–2008 |
Locations
| Location | Patents | Span |
|---|---|---|
| Santa Clara, California, US | 29 | 2003–2016 |
| Los Altos, California, US | 3 | 1999–2003 |
| Palo Alto, California, US | 1 | 1999 |
| San Jose, California, US | 1 | 1996 |