Inventor
WonJun Ko
Inventor
Yongin-si, KR
Overview
Patents· 17 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1055%
H01LSemiconductor devices14%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1014%
H10DInorganic electric semiconductor devices7%
Y10TTechnical subjects covered by former us classification7%
G01BMeasuring length, thickness or similar linear dimensions3%
PatentTitleYear
10,163,744Semiconductor device and method of forming a low profile dual-purpose shield and heat-dissipation structure20189,279,673'Semiconductor device and method of calibrating warpage testing system to accurately measure semiconductor package warpage'20169,252,032'Semiconductor device and method of stacking semiconductor die in mold laser package interconnected by bumps and conductive vias'20169,076,802'Dual-sided film-assist molding process'20158,618,653'Integrated circuit package system with wafer scale heat slug'20138,609,463'Integrated circuit package system employing multi-package module techniques'20138,569,882'Integrated circuit packaging system with collapsed multi-integration package and method of manufacture thereof'20138,546,957'Integrated circuit packaging system with dielectric support and method of manufacture thereof'20138,536,718'Integrated circuit packaging system with trenches and method of manufacture thereof'20138,524,537'Semiconductor device and method of forming protective coating material over semiconductor wafer to reduce lamination tape residue'20138,415,204'Integrated circuit packaging system with heat spreader and method of manufacture thereof'20138,263,435'Semiconductor device and method of stacking semiconductor die in mold laser package interconnected by bumps and conductive vias'20128,227,925'Integrated circuit packaging system with interposer'20128,124,451'Integrated circuit packaging system with interposer'20128,067,275'Integrated circuit package system with package integration'20118,035,211'Integrated circuit package system with support structure under wire-in-film adhesive'20118,022,538'Base package system for integrated circuit package stacking and method of manufacture thereof'2011Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2011–2016Patents assigned to STATS CHIPPAC LTD (16)· patent assignee history
2011–2018Patents assigned to KO WONJUN (14)· patent assignee history
2011–2015Based in Yongin-si, KR· patent location history
2012–2016Patents assigned to YUN JAEUN (5)· patent assignee history
2012–2013Patents assigned to SONG SUNGMIN (4)· patent assignee history
2012–2018Patents assigned to CHOI DAESIK (3)· patent assignee history
2012–2018Based in Kyungki-do, KR· patent location history
2013Based in Ichon-si, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| STATS CHIPPAC LTD | 16 | 2011–2016 |
| KO WONJUNself | 14 | 2011–2018 |
| YUN JAEUN | 5 | 2012–2016 |
| SONG SUNGMIN | 4 | 2012–2013 |
| CHOI DAESIK | 3 | 2012–2018 |
Locations
| Location | Patents | Span |
|---|---|---|
| Yongin-si, KR | 11 | 2011–2015 |
| Kyungki-do, KR | 5 | 2012–2018 |
| Ichon-si, KR | 1 | 2013 |