Inventor
Shien-Yang Wu
Inventor
Hsinchu, TW
Overview
Patents· 35 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1028%
H10DInorganic electric semiconductor devices22%
H01LSemiconductor devices18%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1014%
H10BElectronic memory devices7%
G11CStatic stores4%
G01RMeasuring electric variables3%
G06FElectric digital data processing3%
G01BMeasuring length, thickness or similar linear dimensions1%
PatentTitleYear
10,521,537Method and system of generating layout201910,347,646Anti-fuse cell structure including reading and programming devices with different gate dielectric thickness201910,014,066Anti-fuse cell structure including reading and programming devices with different gate dielectric thickness20189,892,221'Method and system of generating a layout including a fuse layout pattern'20189,881,837'Fin-like field effect transistor (FinFET) based, metal-semiconductor alloy fuse device and method of manufacturing same'20189,865,536'Electrical fuse structure and method of formation'20189,780,003'Bipolar junction transistor formed on fin structures'20179,755,075'High efficiency FinFET diode'20179,741,658'Electrical fuse structure and method of formation'20179,419,087'Bipolar junction transistor formed on fin structures'20169,293,378'High efficiency FinFET diode'20169,099,467'E-fuse structure design in electrical programmable redundancy for embedded memory circuit'20159,093,566'High efficiency FinFET diode'20158,969,999'Fin-like field effect transistor (FinFET) based, metal-semiconductor alloy fuse device and method of manufacturing same'20158,686,536'Electrical fuse structure and method of formation'20148,629,050'E-fuse structure design in electrical programmable redundancy for embedded memory circuit'20148,174,091'Fuse structure'20127,952,142'Variable width offset spacers for mixed signal and system on chip devices'20117,898,028'Process for fabricating a strained channel MOSFET device'20117,892,895'Diode junction poly fuse'20117,782,073'High accuracy and universal on-chip switch matrix testline'20107,678,655'Spacer layer etch method providing enhanced microelectronic device performance'20107,456,066'Variable width offset spacers for mixed signal and system on chip devices'20087,332,791'Electrically programmable polysilicon fuse with multiple level resistance and programming'20087,279,430'Process for fabricating a strained channel MOSFET device'20077,271,431'Integrated circuit structure and method of fabrication'20077,109,564'Low power fuse structure and method of making the same'20067,078,723'Microelectronic device with depth adjustable sill'20066,970,394'Programming method for electrical fuse cell and circuit thereof'20056,956,277'Diode junction poly fuse'20056,885,214'Method for measuring capacitance-voltage curves for transistors'20056,828,198'System-on-chip (SOC) solutions with multiple devices by multiple poly gate trimming process'20046,806,107'Electrical fuse element test structure and method'20046,580,145'Low programming voltage anti-fuse structure'20036,323,097'Electrical overlay/spacing monitor method using a ladder resistor'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (25)· patent assignee history
2001–2017Based in Hsinchu, TW· patent location history
2003–2004Based in Hsin Chu, TW· patent location history
2012–2015Patents assigned to WU SHIEN-YANG (4)· patent assignee history
2012–2014Patents assigned to CHEN SHI-BAI (2)· patent assignee history
2012–2014Patents assigned to CHENG CHUNG LONG (2)· patent assignee history
2014–2019Based in Chu-tung Town, TW· patent location history
2016–2019Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (10)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG | 25 | 2001–2016 |
| TAIWAN SEMICONDUCTOR MFG CO LTD | 10 | 2016–2019 |
| WU SHIEN-YANGself | 4 | 2012–2015 |
| CHEN SHI-BAI | 2 | 2012–2014 |
| CHENG CHUNG LONG | 2 | 2012–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu, TW | 18 | 2001–2017 |
| Chu-tung Town, TW | 15 | 2014–2019 |
| Hsin Chu, TW | 2 | 2003–2004 |