Inventor
Steven Alan Lytle
Inventor
Orlando, FL, US
Overview
Patents· 16 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1026%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1022%
H10DInorganic electric semiconductor devices20%
H10BElectronic memory devices11%
H01LSemiconductor devices9%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests4%
B82YSpecific uses or applications of nanostructures2%
G01RMeasuring electric variables2%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices2%
Y10TTechnical subjects covered by former us classification2%
PatentTitleYear
10,665,596Self aligned active trench contact202010,134,746Self aligned active trench contact20189,640,539'Self aligned active trench contact'20179,245,894'Self aligned active trench contact'20168,728,945'Method for patterning sublithographic features'20147,250,334'Metal insulator metal (MIM) capacitor fabrication with sidewall spacers and aluminum cap (ALCAP) top electrode'20077,160,799'Define via in dual damascene process'20076,989,602'Dual damascene process with no passing metal features'20066,879,046'Split barrier layer including nitrogen-containing portion and oxygen-containing portion'20056,555,910'Use of small openings in large topography features to improve dielectric thickness control and a method of manufacture thereof'20036,362,638'Stacked via Kelvin resistance test structure for measuring contact anomalies in multi-level metal integrated circuit technologies'20026,329,281'Methods for fabricating a multilevel interconnection for an integrated circuit device utilizing a selective overlayer'20016,218,085'Process for photoresist rework to avoid sodium incorporation'20015,891,784'Transistor fabrication method'19995,712,176'Doping of silicon layers'19985,100,827'Buried antifuse'1992Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1992Patents assigned to AT & T BELL LAB (1)· patent assignee history
1992Based in Bethlehem, PA, US· patent location history
1998–2001Patents assigned to LUCENT TECHNOLOGIES INC (3)· patent assignee history
1998–2007Based in Orlando, FL, US· patent location history
2001–2002Patents assigned to AGERE SYST GUARDIAN CORP (2)· patent assignee history
2003–2007Patents assigned to AGERE SYSTEMS INC (4)· patent assignee history
2007–2020Patents assigned to TEXAS INSTRUMENTS INC (6)· patent assignee history
2007–2020Based in McKinney, TX, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TEXAS INSTRUMENTS INC | 6 | 2007–2020 |
| AGERE SYSTEMS INC | 4 | 2003–2007 |
| LUCENT TECHNOLOGIES INC | 3 | 1998–2001 |
| AGERE SYST GUARDIAN CORP | 2 | 2001–2002 |
| AT & T BELL LAB | 1 | 1992 |
Locations
| Location | Patents | Span |
|---|---|---|
| Orlando, Florida, US | 9 | 1998–2007 |
| McKinney, Texas, US | 6 | 2007–2020 |
| Bethlehem, Pennsylvania, US | 1 | 1992 |