Inventor
Hsien-Chin Lin
Inventor
Hsinchu, TW
Overview
Patents· 24 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices39%
H01LSemiconductor devices25%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1020%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%
H10BElectronic memory devices4%
H01MProcesses or means, e.g. batteries, for the direct conversion of chemical energy into electrical energy2%
Y02EReduction of greenhouse gas [ghg] emissions, related to energy generation, transmission or distribution2%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
PatentTitleYear
10,868,003Creating devices with multiple threshold voltages by cut-metal-gate process202010,651,030Cut metal gate process for reducing transistor spacing202010,515,856Method of making a FinFET, and FinFET formed by the method201910,461,078Creating devices with multiple threshold voltage by cut-metal-gate process201910,319,581Cut metal gate process for reducing transistor spacing201910,224,245Method of making a finFET, and finFET formed by the method20199,659,776'Doping for FinFET'20179,373,704'Multiple-gate semiconductor device and method'20169,362,404'Doping for FinFET'20169,349,657'Fabrication methods of integrated semiconductor structure'20169,312,179'Method of making a finFET, and finFET formed by the method'20169,070,624'Semiconductor device including polysilicon resistor and metal gate resistor and methods of fabricating thereof'20158,994,116'Hybrid gate process for fabricating FinFET device'20158,895,383'Multiple-gate semiconductor device and method'20148,796,095'Integrated method for forming metal gate FinFET devices'20148,609,495'Hybrid gate process for fabricating finfet device'20138,426,923'Multiple-gate semiconductor device and method'20138,034,677'Integrated method for forming high-k metal gate FinFET devices'2011RE040138'Method for improving hot carrier lifetime via a nitrogen implantation procedure performed before or after a Teos liner deposition'20086,444,544'Method of forming an aluminum protection guard structure for a copper metal structure'20026,380,021'Ultra-shallow junction formation by novel process sequence for PMOSFET'20026,362,035'Channel stop ion implantation method for CMOS integrated circuits'20026,235,600'Method for improving hot carrier lifetime via a nitrogen implantation procedure performed before or after a teos liner deposition'20015,281,492'Cover device of a storage battery'1994Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1994Based in Tainan, TW· patent location history
2001–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (15)· patent assignee history
2001–2020Based in Hsinchu, TW· patent location history
2013–2016Patents assigned to LIN HSIEN-CHIN (6)· patent assignee history
2013–2016Patents assigned to LIN CHIA-PIN (4)· patent assignee history
2013–2016Patents assigned to LIN SHYUE-SHYH (4)· patent assignee history
2016–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (8)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG | 15 | 2001–2016 |
| TAIWAN SEMICONDUCTOR MFG CO LTD | 8 | 2016–2020 |
| LIN HSIEN-CHINself | 6 | 2013–2016 |
| LIN CHIA-PIN | 4 | 2013–2016 |
| LIN SHYUE-SHYH | 4 | 2013–2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hsinchu, TW | 23 | 2001–2020 |
| Tainan, TW | 1 | 1994 |