Inventor
Mehdi Asnaashari
Inventor
Danville, CA, US
Overview
Patents· 94 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing51%
G11CStatic stores22%
H04LTransmission of digital information, e.g. telegraphic communication7%
H01LSemiconductor devices3%
H10BElectronic memory devices3%
H03KPulse technique2%
H03MCoding2%
H10NElectric solid-state devices not otherwise provided for2%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use2%
G06KGraphical data reading1%
PatentTitleYear
11,127,460Resistive random access memory matrix multiplication structures and methods202111,126,550Integrating a resistive memory system into a multicore CPU die to achieve massive memory parallelism202110,949,091Memory controllers, memory systems, solid state drives and methods for processing a number of commands202110,749,529Memory device including integrated deterministic pattern recognition circuitry202010,699,785Computing memory architecture202010,592,429Cache management for memory module comprising two-terminal resistive memory202010,489,700Neuromorphic logic for an array of high on/off ratio non-volatile memory cells201910,409,714Logical to physical translation for two-terminal memory201910,388,374Programmable logic applications for an array of high on/off ratio and high speed non-volatile memory cells201910,347,335Node retainer circuit incorporating RRAM201910,331,351Memory controllers, memory systems, solid state drives and methods for processing a number of commands201910,248,333Write distribution techniques for two-terminal memory wear leveling201910,169,128Reduced write status error polling for non-volatile resistive memory device201910,101,924Storage processor managing NVMe logically addressed solid state disk array201810,056,907Field programmable gate array utilizing two-terminal non-volatile memory201810,050,629Multi-buffered shift register input matrix to FPGA201810,042,758High availability storage appliance201810,037,272Storage system employing MRAM and array of solid state disks with integrated switch20189,979,540System and method for updating read-only memory in smart card memory modules20189,971,545Non-volatile write and read cache for storage media20189,934,855Node retainer circuit incorporating RRAM20189,916,105'Page management for data operations utilizing a memory device'20189,792,047'Storage processor managing solid state disk array'20179,792,073'Method of LUN management in a solid state disk array'20179,786,369'Enhanced MLC programming'20179,727,245'Method and apparatus for de-duplication for solid state disks (SSDs)'20179,697,874'Monolithic memory comprising 1T1R code memory and 1TnR storage class memory'20179,659,646'Programmable logic applications for an array of high on/off ratio and high speed non-volatile memory cells'20179,652,386'Management of memory array with magnetic random access memory (MRAM)'20179,626,287'Solid state memory formatting'20179,612,958'Wear leveling and improved efficiency for a non-volatile memory device'20179,529,734'Smart storage device'20169,524,210'Separating bits represented by a MLC in connection with ECC'20169,483,632'Intelligent controller system and method for smart card memory modules'20169,471,417'Methods and apparatus for back-annotating errors in a RRAM array'20169,413,535'Critical security parameter generation and exchange system and method for smart-card memory modules'20169,317,206'Host-managed logical mass storage device using magnetic random access memory (MRAM)'20169,311,232'Management of memory array with magnetic random access memory (MRAM)'20169,229,706'Method and apparatus for field firmware updates in data storage systems'20169,213,495'Controller management of memory array of storage device using magnetic random access memory (MRAM) in a mobile device'20159,165,653'Determining sector status in a memory device'20159,111,045'Intelligent controller system and method for smart card memory modules'20159,105,343'Multi-level cells and method for using the same'20159,088,418'System and method for updating read-only memory in smart card memory modules'20159,087,562'Non-volatile storage module having magnetic random access memory (MRAM) with a buffer window'20159,081,669'Hybrid non-volatile memory device'20159,065,654'Parallel encryption/decryption'20159,037,786'Storage system employing MRAM and array of solid state disks with integrated switch'20159,015,356'Memory controllers, memory systems, solid state drives and methods for processing a number of commands'20159,015,553'Data integrity in memory controllers and methods'20159,009,357'Method and apparatus for field firmware updates in data storage systems'20159,009,397'Storage processor managing solid state disk array'20158,966,164'Storage processor managing NVME logically addressed solid state disk array'20158,966,231'Modifying commands'20158,954,658'Method of LUN management in a solid state disk array'20158,954,657'Storage processor managing solid state disk array'20158,947,937'Host-managed logical mass storage device using magnetic random access memory (MRAM)'20158,949,626'Protection of security parameters in storage devices'20158,929,146'Controller management of memory array of storage device using magnetic random access memory (MRAM)'20158,930,711'Critical security parameter generation and exchange system and method for smart-card memory modules'20158,930,671'Logical address offset in response to detecting a memory formatting operation'20158,898,477'System and method for secure firmware update of a secure token having a flash memory controller and a smart card'20148,887,270'Smart storage device'20148,746,578'System and method for updating read-only memory in smart card memory modules'20148,751,700'Memory controllers, memory systems, solid state drives and methods for processing a number of commands'20148,751,731'Memory super block allocation'20148,724,392'Controller management of memory array of storage device using magnetic random access memory (MRAM)'20148,719,492'Non-volatile storage module having magnetic random access memory (MRAM) with a buffer window'20148,683,173'Logical address offset in response to detecting a memory formatting operation'20148,670,276'Host-managed logical mass storage device using magnetic random access memory (MRAM)'20148,595,427'Non-volatile block storage module using magnetic random access memory (MRAM)'20138,547,745'Host-managed logical mass storage device using magnetic random access memory (MRAM)'20138,526,234'Controller management of memory array of storage device using magnetic random access memory (MRAM)'20138,478,916'SATA mass storage device emulation on a PCIe interface'20138,468,417'Data integrity in memory controllers and methods'20138,396,995'Memory controllers, memory systems, solid state drives and methods for processing a number of commands'20138,392,687'Solid state memory formatting'20138,370,645'Protection of security parameters in storage devices'20138,355,499'Parallel encryption/decryption'20138,312,245'Memory block management'20128,307,131'System and method for drive resizing and partition size exchange between a flash memory controller and a smart card'20128,276,042'Determining sector status in a memory device'20128,260,973'Memory controllers, memory systems, solid state drives and methods for processing a number of commands'20128,239,614'Memory super block allocation'20128,225,019'SATA mass storage device emulation on a PCIe interface'20128,180,995'Logical address offset in response to detecting a memory formatting operation'20128,095,765'Memory block management'20128,078,848'Memory controller having front end and back end channels for modifying commands'20118,055,816'Memory controllers, memory systems, solid state drives and methods for processing a number of commands'20117,102,671'Enhanced compact flash memory card'20066,327,639'Method and apparatus for storing location identification information within non-volatile memory devices'20016,076,137'Method and apparatus for storing location identification information within non-volatile memory devices'20005,928,370'Method and apparatus for verifying erasure of memory blocks within a non-volatile memory structure'19995,564,055'PCMCIA slot expander and method'1996Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1996–2006Based in San Jose, CA, US· patent location history
2001Based in San Ramon, CA, US· patent location history
2011–2021Patents assigned to MICRON TECHNOLOGY INC (38)· patent assignee history
2011–2015Patents assigned to ASNAASHARI MEHDI (25)· patent assignee history
2011–2021Based in Danville, CA, US· patent location history
2012–2015Patents assigned to NEMAZIE SIAMACK (9)· patent assignee history
2013–2018Patents assigned to AVALANCHE TECHNOLOGY INC (26)· patent assignee history
2016–2021Patents assigned to CROSSBAR INC (22)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 38 | 2011–2021 |
| AVALANCHE TECHNOLOGY INC | 26 | 2013–2018 |
| ASNAASHARI MEHDIself | 25 | 2011–2015 |
| CROSSBAR INC | 22 | 2016–2021 |
| NEMAZIE SIAMACK | 9 | 2012–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Danville, California, US | 89 | 2011–2021 |
| San Jose, California, US | 4 | 1996–2006 |
| San Ramon, California, US | 1 | 2001 |