Inventor

Naveen Krishnamurthy

Inventor
Bangalore, IN

Overview

24→
Patents
1998–2021
Patent span
Physics
Primary field (CPC G)

Patents· 24 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing49%
H04NPictorial communication, e.g. television17%
G06KGraphical data reading9%
G06VImage or video recognition or understanding9%
H04LTransmission of digital information, e.g. telegraphic communication6%
G11CStatic stores3%
H02JElectric power networks3%
H03KPulse technique3%
H03MCoding3%
PatentTitleYear
11,070,765Method and apparatus for in-camera night lapse video202111,050,927Temporal information synchronization of imaging devices202110,863,097Field of view adjustment202010,817,726Systems and methods for identifying moments in videos202010,614,315Systems and methods for identifying moments in videos202010,395,122Systems and methods for identifying moments in videos20199,921,753'Data replication across host systems via storage controller'20189,727,472'Cache coherency and synchronization support in expanders in a raid topology with multiple initiators'20179,542,126'Redundant array of independent disks systems that utilize spans with different storage device counts for a logical volume'20179,542,272'Write redirection in redundant array of independent disks systems'20179,378,103'Coordination techniques for redundant array of independent disks storage controllers'20169,304,876'Logical volume migration in single server high availability environments'20169,304,779'Optimizing boot time of a storage system'20169,274,901'I/O request mirroring in a clustered storage system'20169,268,695'Methods and structure for using region locks to divert I/O requests in a storage controller having multiple processing stacks'20169,229,654'Input/output request shipping in a storage system with multiple storage controllers'20169,104,334'Performance improvements in input/output operations between a host system and an adapter-coupled cache'20158,880,802'I/O control, synchronization method in a raid environment with co-existing hardware and software-based I/O paths'20148,782,292'Methods and structure for performing a rebuild of a logical volume with a serial attached SCSI expander'20148,583,840'Methods and structure for determining mapping information inconsistencies in I/O requests generated for fast path circuits of a storage controller'20138,566,686'System and method for optimizing read-modify-write operations in a RAID 6 volume'20135,880,978'Method and apparatus for creating an output vector from an input vector'19995,845,099'Length detecting unit for parallel processing of variable sequential instructions'19985,825,206'Five volt safe output buffer circuit that controls the substrate and gates of the pull-up devices'1998

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1998–1999Patents assigned to INTEL CORP (3)· patent assignee history
1998–1999Based in Sunnyvale, CA, US· patent location history
2013–2017Patents assigned to LSI CORP (13)· patent assignee history
2013–2014Patents assigned to KRISHNAMURTHY NAVEEN (3)· patent assignee history
2013–2018Based in Bangalore, IN· patent location history
2015–2018Patents assigned to AVAGO TECHNOLOGIES GENERAL IP (11)· patent assignee history
2019–2021Patents assigned to GOPRO INC (6)· patent assignee history
2019–2021Based in Fremont, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
LSI CORP132013–2017
AVAGO TECHNOLOGIES GENERAL IP112015–2018
GOPRO INC62019–2021
INTEL CORP31998–1999
KRISHNAMURTHY NAVEENself32013–2014
Locations
LocationPatentsSpan
Bangalore, IN152013–2018
Fremont, California, US62019–2021
Sunnyvale, California, US31998–1999