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Inventor

Dipankar Talukdar

Inventor
San Jose, CA, US

Overview

5→
Patents
1997–2016
Patent span
Physics
Primary field (CPC G)

Patents· 5 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing33%
H04NPictorial communication, e.g. television33%
G06TImage data processing or generation, in general17%
G06VImage or video recognition or understanding17%
PatentTitleYear
9,501,412'External memory tagging and stack ordering of memory tags'20168,437,405'System and method for intra refresh implementation'20138,355,449'System and method for intra refresh implementation with pseudo random number generation'20136,701,490'Cycle and phase accurate hardware-software coverification'20045,621,815'Global threshold method and apparatus'1997

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1997Based in Buffalo, NY, US· patent location history
2004Based in Irvine, CA, US· patent location history
2013Patents assigned to GARG ATUL (2)· patent assignee history
2013Patents assigned to MOCCAGATTA IOLE (2)· patent assignee history
2013Patents assigned to MONI SHANKAR (2)· patent assignee history
2013Patents assigned to NVIDIA CORP (2)· patent assignee history
2013Patents assigned to SHYAMSUKHA SANDEEP (2)· patent assignee history
2013–2016Based in San Jose, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
GARG ATUL22013
MOCCAGATTA IOLE22013
MONI SHANKAR22013
NVIDIA CORP22013
SHYAMSUKHA SANDEEP22013
Locations
LocationPatentsSpan
San Jose, California, US32013–2016
Irvine, California, US12004
Buffalo, New York, US11997