Inventor
Warren R. Morrow
Inventor
Steilacoom, WA, US
Overview
Patents· 21 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing37%
G11CStatic stores30%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use15%
H01LSemiconductor devices4%
H10BElectronic memory devices4%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h104%
H03KPulse technique2%
H04JMultiplex communication2%
PatentTitleYear
9,768,148'Stacked memory with interface providing offset interconnects'20178,971,087'Stacked memory with interface providing offset interconnects'20158,510,612'Disabling outbound drivers for a last memory buffer on a memory channel'20138,489,944'Disabling outbound drivers for a last memory buffer on a memory channel'20138,286,039'Disabling outbound drivers for a last memory buffer on a memory channel'20128,135,999'Disabling outbound drivers for a last memory buffer on a memory channel'20128,020,056'Memory channel with bit lane fail-over'20117,761,753'Memory channel with bit lane fail-over'20107,386,768'Memory channel with bit lane fail-over'20087,366,368'Optical add/drop interconnect bus for multiprocessor architecture'20087,318,130'System and method for thermal throttling of memory modules'20087,269,481'Method and apparatus for memory bandwidth thermal budgetting'20077,130,229'Interleaved mirrored memory systems'20067,076,618'Memory controllers with interleaved mirrored memory modes'20067,017,017'Memory controllers with interleaved mirrored memory modes'20066,708,240'Managing resources in a bus bridge'20046,693,450'Dynamic swing voltage adjustment'20046,502,154'Bus bridging method and apparatus including use of read size indicators'20026,487,627'Method and apparatus to manage digital bus traffic'20025,721,857'Method and apparatus for saving the effective address of floating point memory operations in an out-of-order microprocessor'19985,612,909'Method and apparatus for rounding operands using previous rounding history'1997Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1997–2017Patents assigned to INTEL CORP (21)· patent assignee history
1997–1998Based in Vancouver, WA, US· patent location history
2002–2017Based in Steilacoom, WA, US· patent location history
2002Based in Stellacoom, WA, US· patent location history
2012–2013Patents assigned to BRZEZINSKI DENNIS W (3)· patent assignee history
2012–2015Patents assigned to MORROW WARREN (3)· patent assignee history
2012–2015Patents assigned to VOGT PETE (3)· patent assignee history
2012–2013Patents assigned to MORROW WARREN R (2)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 21 | 1997–2017 |
| BRZEZINSKI DENNIS W | 3 | 2012–2013 |
| MORROW WARRENself | 3 | 2012–2015 |
| VOGT PETE | 3 | 2012–2015 |
| MORROW WARREN Rself | 2 | 2012–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Steilacoom, Washington, US | 18 | 2002–2017 |
| Vancouver, Washington, US | 2 | 1997–1998 |
| Stellacoom, Washington, US | 1 | 2002 |