Inventor

Linda J. Rankin

Inventor

Portland, OR, US

Overview

1995–2017

Patent span

Physics

Primary field (CPC G)

Patents· 45 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing79%

G01KMeasuring temperature7%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use7%

H04LTransmission of digital information, e.g. telegraphic communication4%

G11BInformation storage based on relative movement between record carrier and transducer2%

H03MCoding2%

PatentTitleYear

9,779,249'Launching a secure kernel in a multiprocessor system'2017 9,507,952'Launching a secure kernel in a multiprocessor system'2016 9,213,865'Launching a secure kernel in a multiprocessor system'2015 8,874,906'Launching a secure kernel in a multiprocessor system'2014 8,745,306'Scalable distributed memory and I/O multiprocessor system'2014 8,473,715'Dynamic accelerator reconfiguration via compiler-inserted initialization message and configuration address and size information'2013 8,464,048'Launching a secure kernel in a multiprocessor system'2013 8,255,605'Scalable distributed memory and I/O multiprocessor system'2012 8,250,364'Launching a secure kernel in a multiprocessor system'2012 8,161,280'Launching a secure kernel in a multiprocessor system'2012 8,082,418'Method and apparatus for coherent device initialization and access'2011 7,930,459'Coherent input output device'2011 7,930,464'Scalable memory and I/O multiprocessor systems'2011 7,822,900'Apparatus and method for enumeration of processors during hot-plug of a compute node'2010 7,774,600'Launching a secure kernel in a multiprocessor system'2010 7,770,005'Launching a secure kernel in a multiprocessor system'2010 7,757,081'Launching a secure kernel in a multiprocessor system'2010 7,725,713'Launching a secure kernel in a multiprocessor system'2010 7,698,552'Launching a secure kernel in a multiprocessor system'2010 7,673,090'Hot plug interface control method and apparatus'2010 7,617,363'Low latency message passing mechanism'2009 7,603,508'Scalable distributed memory and I/O multiprocessor systems and associated methods'2009 7,493,438'Apparatus and method for enumeration of processors during hot-plug of a compute node'2009 7,486,685'System for sharing channels by interleaving flits'2009 7,346,825'Error method, system and medium'2008 7,343,442'Scalable distributed memory and I/O multiprocessor systems and associated methods'2008 7,158,911'Methods and apparatus for thermal management of an integrated circuit die'2007 7,117,311'Hot plug cache coherent interface method and apparatus'2006 7,058,750'Scalable distributed memory and I/O multiprocessor system'2006 7,000,102'Platform and method for supporting hibernate operations'2006 6,980,918'Methods and apparatus for thermal management of an integrated circuit die'2005 6,917,999'Platform and method for initializing components within hot-plugged nodes'2005 6,915,370'Domain partitioning in a multi-node system'2005 6,857,048'Pseudo least-recently-used (PLRU) replacement method for a multi-node snoop filter'2005 6,813,665'Interrupt method, system and medium'2004 6,789,037'Methods and apparatus for thermal management of an integrated circuit die'2004 6,718,441'Method to prefetch data from system memory using a bus interface unit'2004 6,487,626'Method and apparatus of bus interface for a processor'2002 6,453,388'Computer system having a bus interface unit for prefetching data from system memory'2002 6,412,033'Method and apparatus for data and address transmission over a bus'2002 6,393,374'Programmable thermal management of an integrated circuit die'2002 5,898,894'CPU reads data from slow bus if I/O devices connected to fast bus do not acknowledge to a read request after a predetermined time interval'1999 5,634,043'Microprocessor point-to-point communication'1997 5,613,071'Method and apparatus for providing remote memory access in a distributed memory multiprocessor system'1997 5,455,939'Method and apparatus for error detection and correction of data transferred between a CPU and system memory'1995

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1995–2017Patents assigned to INTEL CORP (43)· patent assignee history

1995–2009Based in Beaverton, OR, US· patent location history

2004–2017Based in Portland, OR, US· patent location history

2009–2014Patents assigned to RANKIN LINDA J (6)· patent assignee history

2012–2013Patents assigned to GRAWROCK DAVID W (3)· patent assignee history

2012–2013Patents assigned to GREINER ROBERT J (3)· patent assignee history

2012–2013Patents assigned to SCHOINAS IOANNIS T (3)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
INTEL CORP	43	1995–2017
RANKIN LINDA Jself	6	2009–2014
GRAWROCK DAVID W	3	2012–2013
GREINER ROBERT J	3	2012–2013
SCHOINAS IOANNIS T	3	2012–2013

Locations

Location	Patents	Span
Portland, OR, US	33	2004–2017
Beaverton, OR, US	12	1995–2009