Inventor
Shigeru Tahara
Inventor
Nirasaki, JP
Overview
Patents· 31 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1031%
H01LSemiconductor devices16%
H01JElectric discharge tubes or discharge lamps14%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1011%
H05HPlasma technique5%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices4%
H10DInorganic electric semiconductor devices3%
B05DProcesses for applying fluent materials to surfaces, in general2%
C23CCoating metallic material2%
C23FNon-mechanical removal of metallic material from surface2%
PatentTitleYear
10,861,678Plasma etching apparatus and method202010,825,688Method for etching copper layer202010,770,308Etching method202010,626,498Method of processing target object to be processed202010,319,905Method and system for performing post-etch annealing of a workpiece201910,236,162Method of etching porous film201910,229,815Plasma etching apparatus and method201910,074,800Method for etching magnetic layer including isopropyl alcohol and carbon dioxide20189,859,102'Method of etching porous film'20189,786,473'Method of processing workpiece'20179,263,288'Etching method using block-copolymers'20169,177,781'Plasma processing method and manufacturing method of semiconductor device'20159,177,816'Deposit removal method'20159,126,229'Deposit removal method'20159,023,733'Method for block-copolymer lithography'20158,986,493'Etching apparatus'20158,852,385'Plasma etching apparatus and method'20148,614,140'Semiconductor device manufacturing apparatus'20138,524,101'Method and apparatus for manufacturing semiconductor device, and storage medium'20138,492,287'Substrate processing method'20138,404,596'Plasma ashing method'20138,361,275'Etching apparatus'20138,349,085'Substrate processing apparatus'20138,282,984'Processing condition inspection and optimization method of damage recovery process, damage recovering system and storage medium'20128,101,507'Semiconductor device manufacturing method and semiconductor device manufacturing apparatus'20128,026,150'Semiconductor device manufacturing method and storage medium'20117,964,511'Plasma ashing method'20117,892,986'Ashing method and apparatus therefor'20117,882,800'Ring mechanism, and plasma processing device using the ring mechanism'20117,674,393'Etching method and apparatus'2010D0470885'Marking pen'2003Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2010–2020Patents assigned to TOKYO ELECTRON LTD (30)· patent assignee history
2010–2015Based in Nirasaki, JP· patent location history
2011–2020Based in Yamanashi, JP· patent location history
2012–2015Patents assigned to TAHARA SHIGERU (11)· patent assignee history
2012–2013Patents assigned to ASAKO RYUICHI (2)· patent assignee history
2015–2016Patents assigned to IMEC (2)· patent assignee history
2015Patents assigned to NISHIMURA EIICHI (2)· patent assignee history
2015–2020Based in Miyagi, JP· patent location history
2015Based in Kurokawa-gun, JP· patent location history
2019Based in Auderghem, BE· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TOKYO ELECTRON LTD | 30 | 2010–2020 |
| TAHARA SHIGERUself | 11 | 2012–2015 |
| ASAKO RYUICHI | 2 | 2012–2013 |
| IMEC | 2 | 2015–2016 |
| NISHIMURA EIICHI | 2 | 2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Nirasaki, JP | 12 | 2010–2015 |
| Miyagi, JP | 8 | 2015–2020 |
| Yamanashi, JP | 7 | 2011–2020 |
| Auderghem, BE | 1 | 2019 |
| Kurokawa-gun, JP | 1 | 2015 |