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Inventor

Chun Lin Tsai

Inventor
Hsinchu, TW

Overview

88→
Patents
2004–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 88 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Dprimary
H10DInorganic electric semiconductor devices35%
H01LSemiconductor devices27%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1016%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1015%
H03KPulse technique3%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems2%
Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications1%
H10BElectronic memory devices0%
PatentTitleYear
10,879,236Bootstrap metal-oxide-semiconductor (MOS) device integrated with a high voltage MOS (HVMOS) device and a high voltage junction termination (HVJT) device202010,867,990Series resistor over drain region in high voltage device202010,854,711Isolation structure for active devices202010,804,895Low static current semiconductor device202010,790,375High electron mobility transistor202010,741,665Method of forming a high electron mobility transistor202010,727,329Semiconductor device202010,686,032High voltage resistor with high voltage junction termination202010,679,987Bootstrap metal-oxide-semiconductor (MOS) device integrated with a high voltage MOS (HVMOS) device and a high voltage junction termination (HVJT) device202010,535,730High voltage metal-oxide-semiconductor (HVMOS) device integrated with a high voltage junction termination (HVJT) device202010,522,671Semiconductor structure and manufacturing method thereof201910,522,618Isolation structure for active devices201910,510,882Embedded JFETs for high voltage applications201910,483,259Series resistor over drain region in high voltage device201910,319,644Method for manufacturing semiconductor structure201910,297,661High voltage resistor device201910,284,195Low static current semiconductor device201910,276,657Isolation structure for active devices201910,276,682High electron mobility transistor201910,269,949Semiconductor structure, HEMT structure and method of forming the same201910,170,613Semiconductor device201910,121,890High voltage transistor structure201810,103,223High voltage resistor with pin diode isolation201810,083,856Isolation regions for semiconductor structures and methods of forming the same201810,068,976Enhancement mode field-effect transistor with a gate dielectric layer recessed on a composite barrier layer for high static performance201810,062,776Semiconductor structure and manufacturing method thereof201810,050,621Low static current semiconductor device201810,050,117Method of forming a high electron mobility transistor201810,014,291SiC crystalline on Si substrates to allow integration of GaN and Si electronics20189,985,103Method of forming high electron mobility transistor20189,941,268Series resistor over drain region in high voltage device20189,812,562'Semiconductor structure, HEMT structure and method of forming the same'20179,793,385'Insulated gate bipolar transistor structure having low substrate leakage'20179,793,389'Apparatus and method of fabrication for GaN/Si transistors isolation'20179,722,065'Semiconductor device'20179,704,968'Method of forming a high electron mobility transistor'20179,680,009'High voltage semiconductor device'20179,673,323'Embedded JFETs for high voltage applications'20179,660,108'Bootstrap MOS for high voltage applications'20179,627,275'Hybrid semiconductor structure on a common substrate'20179,601,585'Transistor having a wing region'20179,570,598'Method of forming a semiconductor structure'20179,508,807'Method of forming high electron mobility transistor'20169,391,195'High side gate driver device'20169,385,178'High voltage resistor with PIN diode isolation'20169,379,191'High electron mobility transistor including an isolation region'20169,379,188'Insulated gate bipolar transistor structure having low substrate leakage'20169,373,619'High voltage resistor with high voltage junction termination'20169,343,542'Method for fabricating enhancement mode transistor'20169,331,195'Source tip optimization for high voltage transistor devices which includes a P-body extension region'20169,306,012'Strip-ground field plate'20169,299,694'Stacked and tunable power fuse'20169,263,565'Method of forming a semiconductor structure'20169,257,979'Embedded JFETs for high voltage applications'20169,257,533'Method of making an insulated gate bipolar transistor structure'20169,224,732'Method of forming high voltage device'20159,224,827'High voltage resistor'20159,214,547'Insulated gate bipolar transistor structure having low substrate leakage'20159,190,476'High voltage and ultra-high voltage semiconductor devices with increased breakdown voltages'20159,190,535'Bootstrap MOS for high voltage applications'20159,111,905'High electron mobility transistor and method of forming the same'20159,111,849'High voltage resistor with biased-well'20159,099,556'Transistor having an active region with wing structure'20159,035,379'High voltage and ultra-high voltage semiconductor devices with increased breakdown voltages'20158,969,913'Insulated gate bipolar transistor structure having low substrate leakage'20158,946,012'Method of forming a semiconductor structure'20158,895,993'Low gate-leakage structure and method for gallium nitride enhancement mode transistor'20148,803,232'High voltage and ultra-high voltage semiconductor devices with increased breakdown voltages'20148,786,050'High voltage resistor with biased-well'20148,704,279'Embedded JFETs for high voltage applications'20148,704,312'High voltage devices and methods of forming the high voltage devices'20148,697,505'Method of forming a semiconductor structure'20148,680,616'High side gate driver device'20148,664,741'High voltage resistor with pin diode isolation'20148,629,513'HV interconnection solution using floating conductors'20148,629,026'Source tip optimization for high voltage transistor devices'20148,624,322'High voltage device with a parallel resistor'20148,598,679'Stacked and tunable power fuse'20138,587,073'High voltage resistor'20138,575,694'Insulated gate bipolar transistor structure having low substrate leakage'20138,507,920'Semiconductor structure and method of forming the same'20138,502,326'Gate dielectric formation for high-voltage MOS devices'20138,389,348'Mechanism of forming SiC crystalline on Si substrates to allow integration of GaN and Si electronics'20138,159,029'High voltage device having reduced on-state resistance'20128,158,475'Gate electrodes of HVMOS devices having non-uniform doping concentrations'20127,816,744'Gate electrodes of HVMOS devices having non-uniform doping concentrations'20106,847,061'Elimination of implant damage during manufacture of HBT'20056,703,282'Method of reducing NMOS device current degradation via formation of an HTO layer as an underlying component of a nitride-oxide sidewall spacer'2004

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2004–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (43)· patent assignee history
2004–2020Based in Hsinchu, TW· patent location history
2012–2016Patents assigned to SU RU-YI (14)· patent assignee history
2013–2018Patents assigned to TSAI CHUN LIN (20)· patent assignee history
2013–2016Patents assigned to YANG FU-CHIH (16)· patent assignee history
2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (45)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG CO LTD452015–2020
TAIWAN SEMICONDUCTOR MFG432004–2016
TSAI CHUN LINself202013–2018
YANG FU-CHIH162013–2016
SU RU-YI142012–2016
Locations
LocationPatentsSpan
Hsinchu, TW882004–2020