Inventor
Tomoya Uda
Inventor
Osaka, JP
Overview
Patents· 6 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices75%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1025%
PatentTitleYear
6,376,898'Bipolar transistor layout with minimized area and improved heat dissipation'20026,232,159'Method for fabricating compound semiconductor device'20016,037,200'Compound semiconductor device and fabrication method'20005,994,728'Field effect transistor and method for producing the same'19995,907,177'Semiconductor device having a tapered gate electrode'19995,824,575'Semiconductor device and method of manufacturing the same'1998Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1998–2002Patents assigned to MATSUSHITA ELECTRIC INDUSTRIAL CO LTD (5)· patent assignee history
1998Based in Kyoto, JP· patent location history
1999Patents assigned to MATSUSHITA ELECTRONICS CORP (1)· patent assignee history
1999–2002Based in Osaka, JP· patent location history
1999Based in Takatsuki, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MATSUSHITA ELECTRIC INDUSTRIAL CO LTD | 5 | 1998–2002 |
| MATSUSHITA ELECTRONICS CORP | 1 | 1999 |
Locations
| Location | Patents | Span |
|---|---|---|
| Osaka, JP | 4 | 1999–2002 |
| Takatsuki, JP | 1 | 1999 |
| Kyoto, JP | 1 | 1998 |