Inventor
Nak-Won Heo
Inventor
Suwon-si, KR
Overview
Patents· 15 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores61%
F25BRefrigeration machines, plants or systems13%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses9%
E05YIndexing scheme associated with subclasses e05d and e05f, relating to construction elements, electric control, power supply, power signal or transmission, user interfaces, mounting or coupling, details, accessories, auxiliary operations not otherwise provided for, application thereof4%
E06BFixed or movable closures for openings in buildings, vehicles, fences or like enclosures in general, e.g. doors, windows, blinds, gates4%
G06FElectric digital data processing4%
H03KPulse technique4%
PatentTitleYear
9,858,981'Semiconductor memory devices including redundancy memory cells'20189,524,770'Semiconductor memory devices including redundancy memory cells'20169,336,906'Semiconductor memory devices including redundancy memory cells'20168,625,364'Semiconductor memory devices and systems including data output circuits to output stored data during first output mode and output programmed data pattern during second output mode'20148,199,588'Semiconductor memory device with a data output circuit configured to output stored data during a first type of read operation and configured to output at least one data pattern during a second type of read operation and methods thereof'20127,558,127'Data output circuit and method in DDR synchronous semiconductor device'20097,551,495'Semiconductor memory device with a data output circuit configured to output stored data during a first type of read operation and configured to output at least one data pattern during a second type of read operation and methods thereof'20097,518,898'Semiconductor memory device with strengthened power and method of strengthening power of the same'20097,447,084'Semiconductor memory device and method of supplying wordline voltage thereof'20087,376,021'Data output circuit and method in DDR synchronous semiconductor device'20087,068,084'Delay locked loop capable of compensating for delay of internal clock signal by variation of driving strength of output driver in semiconductor memory device'20066,940,321'Circuit for generating a data strobe signal used in a double data rate synchronous semiconductor device'20056,839,786'Information processing system with memory modules of a serial bus architecture'20056,717,448'Data output method and data output circuit for applying reduced precharge level'20046,621,315'Delay locked loop circuit and method having adjustable locking resolution'2003Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2003–2018Patents assigned to SAMSUNG ELECTRONICS CO LTD (15)· patent assignee history
2003–2012Based in Suwon-si, KR· patent location history
2005Based in Kyungki-do, KR· patent location history
2005Based in Yongin, KR· patent location history
2008–2014Based in Gyeonggi-do, KR· patent location history
2012–2016Patents assigned to HEO NAK-WON (3)· patent assignee history
2016Patents assigned to HWANG SANG-JOON (1)· patent assignee history
2016Patents assigned to LEE SANG-BO (1)· patent assignee history
2016Patents assigned to LEE YUN-YOUNG (1)· patent assignee history
2016–2018Based in Hwaseong-si, KR· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 15 | 2003–2018 |
| HEO NAK-WONself | 3 | 2012–2016 |
| HWANG SANG-JOON | 1 | 2016 |
| LEE SANG-BO | 1 | 2016 |
| LEE YUN-YOUNG | 1 | 2016 |
Locations
| Location | Patents | Span |
|---|---|---|
| Suwon-si, KR | 7 | 2003–2012 |
| Hwaseong-si, KR | 3 | 2016–2018 |
| Gyeonggi-do, KR | 3 | 2008–2014 |
| Kyungki-do, KR | 1 | 2005 |
| Yongin, KR | 1 | 2005 |