Inventor
MICHAEL P. BELYANSKY
Inventor
US
Overview
Patents· 7 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H01Lprimary
H01LSemiconductor devices28%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1024%
H10DInorganic electric semiconductor devices20%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1020%
B32BLayered products, i.e. products built-up of strata of flat or non-flat, e.g. cellular or honeycomb, form4%
B82YSpecific uses or applications of nanostructures4%
PatentTitleYear
12,402,391Stressed material within gate cut region202512,300,615Infrared debond damage mitigation by copper fill pattern202511,908,723Silicon handler with laser-release layers202411,715,783Uniform horizontal spacer202311,282,962Threshold voltage adjustment from oxygen vacancy by scavenge metal filling at gate cut (CT)202211,257,716Self-aligned gate cap including an etch-stop layer202211,222,820Self-aligned gate cap including an etch-stop layer2022Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2022–2025Patents assigned to IBM (7)· patent assignee history
2022–2025Based in US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 7 | 2022–2025 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 7 | 2022–2025 |