Inventor
Vishnu K. Khemka
Inventor
Phoenix, AZ, US
Overview
Patents· 66 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices62%
H01LSemiconductor devices15%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1012%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h108%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
H03KPulse technique1%
H10BElectronic memory devices1%
PatentTitleYear
11,004,970Mirror device structure for power MOSFET and method of manufacture202110,811,502Method of manufacture of super-junction power semiconductor device202010,672,902Bidirectional power MOSFET structure with a cathode short structure202010,644,146Vertical bi-directional switches and method for making same202010,600,879Transistor trench structure with field plate structures202010,600,911Field-effect transistor and method therefor202010,431,678Termination design for trench superjunction power MOSFET201910,297,684Bidirectional power MOSFET structure with a cathode short structure201910,153,357Superjunction power semiconductor device and method for forming201810,103,257Termination design for trench superjunction power MOSFET20189,397,233'High voltage deep trench capacitor'20169,209,277'Manufacturing methods for laterally diffused metal oxide semiconductor devices'20159,196,680'Metal oxide semiconductor field effect transistor with reduced surface field folding'20159,196,681'Metal oxide semiconductor field effect transistor with reduced surface field folding'20158,987,818'Integrated MOS power transistor with thin gate oxide and low gate charge'20158,969,958'Integrated MOS power transistor with body extension region for poly field plate depletion assist'20158,963,241'Integrated MOS power transistor with poly field plate extension for depletion assist'20158,946,851'Integrated MOS power transistor with thin gate oxide and low gate charge'20158,907,419'LDMOS with enhanced safe operating area (SOA) and method therefor'20148,816,434'Laterally double diffused metal oxide semiconductor transistors having a reduced surface field structures'20148,623,732'Methods of making laterally double diffused metal oxide semiconductor transistors having a reduced surface field structure'20148,384,184'Laterally diffused metal oxide semiconductor device'20138,344,472'Semiconductor device and method'20138,338,872'Electronic device with capcitively coupled floating buried layer'20128,330,220'LDMOS with enhanced safe operating area (SOA) and method therefor'20128,278,710'Guard ring integrated LDMOS'20128,193,585'Semiconductor device with increased snapback voltage'20128,188,543'Electronic device including a conductive structure extending through a buried insulating layer'20128,134,222'MOS capacitor structures'20127,851,857'Dual current path LDMOSFET with graded PBL for ultra high voltage smart power applications'20107,851,889'MOSFET device including a source with alternating P-type and N-type regions'20107,838,383'Methods for forming MOS capacitors'20107,820,519'Process of forming an electronic device including a conductive structure extending through a buried insulating layer'20107,791,161'Semiconductor devices employing poly-filled trenches'20107,777,257'Bipolar Schottky diode and method'20107,763,937'Variable resurf semiconductor device and method'20107,732,274'High voltage deep trench capacitor'20107,723,204'Semiconductor device with a multi-plate isolation structure'20107,608,908'Robust deep trench isolation'20097,550,804'Semiconductor device and method for forming the same'20097,511,319'Methods and apparatus for a stepped-drift MOSFET'20097,476,593'Semiconductor device and method of forming the same'20097,466,006'Structure and method for RESURF diodes with a current diverter'20087,439,584'Structure and method for RESURF LDMOSFET with a current diverter'20087,436,025'Termination structures for super junction devices'20087,405,128'Dotted channel MOSFET and method'20087,355,260'Schottky device and method of forming'20087,329,566'Semiconductor device and method of manufacture'20087,309,638'Method of manufacturing a semiconductor component'20077,282,386'Schottky device and method of forming'20077,276,419'Semiconductor device and method for forming the same'20077,244,989'Semiconductor device and method of manufacture'20077,180,158'Semiconductor device and method of manufacture'20077,141,860'LDMOS transistor'20067,095,092'Semiconductor device and method of forming the same'20067,071,518'Schottky device'20066,933,546'Semiconductor component'20056,930,027'Method of manufacturing a semiconductor component'20056,882,023'Floating resurf LDMOSFET and method of manufacturing same'20056,815,780'Semiconductor component with substrate injection protection structure'20046,750,524'Trench MOS RESURF super-junction devices'20046,734,524'Electronic component and method of manufacturing same'20046,703,895'Semiconductor component and method of operating same'20046,693,339'Semiconductor component and method of manufacturing same'20046,573,562'Semiconductor component and method of operation'20036,528,849'Dual-gate resurf superjunction lateral DMOSFET'2003Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2003–2005Based in Mesa, AZ, US· patent location history
2003–2004Based in Scottsdale, AZ, US· patent location history
2004–2016Based in Phoenix, AZ, US· patent location history
2005–2015Patents assigned to FREESCALE SEMICONDUCTOR INC (41)· patent assignee history
2009–2021Based in Chandler, AZ, US· patent location history
2012–2016Patents assigned to ZHU RONGHUA (13)· patent assignee history
2012–2014Patents assigned to KHEMKA VISHNU K (10)· patent assignee history
2012–2014Patents assigned to KHAN TAHIR A (9)· patent assignee history
2018–2021Patents assigned to NXP USA INC (10)· patent assignee history
2018–2019Based in Austin, TX, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| FREESCALE SEMICONDUCTOR INC | 41 | 2005–2015 |
| ZHU RONGHUA | 13 | 2012–2016 |
| KHEMKA VISHNU Kself | 10 | 2012–2014 |
| NXP USA INC | 10 | 2018–2021 |
| KHAN TAHIR A | 9 | 2012–2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Phoenix, AZ, US | 47 | 2004–2016 |
| Chandler, AZ, US | 10 | 2009–2021 |
| Mesa, AZ, US | 5 | 2003–2005 |
| Austin, Texas, US | 2 | 2018–2019 |
| Scottsdale, AZ, US | 2 | 2003–2004 |