Inventor

Deepti Vijayalakshmi Sriramagiri

Inventor

San Diego, CA, US

Overview

15→

Patents

2013–2021

Patent span

Physics

Primary field (CPC G)

Patents· 15 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary

G11CStatic stores38%

G06FElectric digital data processing35%

Y02BClimate change mitigation technologies related to buildings, e.g. housing, house appliances or related end-user applications8%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use8%

H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses5%

G01RMeasuring electric variables3%

H03MCoding3%

H04LTransmission of digital information, e.g. telegraphic communication3%

PatentTitleYear

10,922,168Dynamic link error protection in memory systems2021 10,853,163Optimized error-correcting code (ECC) for data protection2020 10,387,242Dynamic link error protection in memory systems2019 9,911,485'Method and apparatus for refreshing a memory cell'2018 9,812,222'Method and apparatus for in-system management and repair of semi-conductor memory failure'2017 9,704,557'Method and apparatus for storing retention time profile information based on retention time and temperature'2017 9,633,698'Dynamic control of signaling power based on an error rate'2017 9,583,219'Method and apparatus for in-system repair of memory in burst refresh'2017 9,524,771'DRAM sub-array level autonomic refresh memory controller optimization'2016 9,507,675'Systems and methods for recovering from uncorrected DRAM bit errors'2016 9,495,261'Systems and methods for reducing memory failures'2016 9,437,278'Low latency synchronization scheme for mesochronous DDR system'2016 9,299,457'Kernel masking of DRAM defects'2016 9,123,408'Low latency synchronization scheme for mesochronous DDR system'2015 8,347,020'Memory access controller, systems, and methods for optimizing memory access times'2013

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

2013–2021Patents assigned to QUALCOMM INC (15)· patent assignee history

2013Patents assigned to MADDALI SRINIVAS (1)· patent assignee history

2013Patents assigned to SRIRAMAGIRI DEEPTI (1)· patent assignee history

2013–2021Based in San Diego, CA, US· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
QUALCOMM INC	15	2013–2021
MADDALI SRINIVAS	1	2013
SRIRAMAGIRI DEEPTIself	1	2013

Locations

Location	Patents	Span
San Diego, California, US	15	2013–2021