Inventor
Mamoru Sasaki
Inventor
Hiroshima, JP
Overview
Patents· 18 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1016%
G11BInformation storage based on relative movement between record carrier and transducer13%
H02KDynamo-electric machines10%
H05KPrinted circuits10%
H03FAmplifiers6%
Y10TTechnical subjects covered by former us classification6%
B23KSoldering or unsoldering3%
B65HHandling thin or filamentary material, e.g. sheets, webs, cables3%
C08LCompositions of macromolecular compounds3%
G01RMeasuring electric variables3%
PatentTitleYear
8,844,858'Wire winding device'20148,476,801'Stator, and stator manufacturing apparatus'20137,974,648'Radio communication system, and transmitter, receiver, transmitting circuit, and receiving circuit used for the same'20117,545,663'Semiconductor storage device'20097,538,603'Signal distribution architecture and semiconductor device'20097,336,123'Chopper amplifier circuit apparatus operable at low voltage utilizing switched operational amplifier'20087,301,399'Class AB CMOS output circuit equipped with CMOS circuit operating by predetermined operating current'20077,098,682'Testing method and tester for semiconductor integrated circuit device comprising high-speed input/output element'20067,015,841'Analog to digital converter circuit of successive approximation type operating at low voltage'20066,340,546'Positive photosensitive resin composition, method of forming relief pattern, and electronic part'20025,992,007'Apparatus for covering permanent magnets on motor rotor with cylindrical sleeve'19995,875,078'Magnetoresistance thin film magnetic head having reduced terminal count; and bias characteristics measuring method'19995,867,350'Magneto-resistance effect head with insulated bias conductor embedded in shield groove'19995,533,664'Method of manufacturing a semiconductor device'19965,508,563'Semiconductor assembly having laminated semiconductor devices'19965,394,010'Semiconductor assembly having laminated semiconductor devices'19955,272,582'Magneto-resistance effect magnetic head with static electricity protection'19935,270,893'Specific core structure in a magneto-resistance head'1993Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1993–1999Patents assigned to SONY CORP (4)· patent assignee history
1993–1999Based in Miyagi, JP· patent location history
1993–1996Based in Tokyo, JP· patent location history
1995–1996Patents assigned to TOSHIBA KK (3)· patent assignee history
1999–2014Patents assigned to HONDA MOTOR CO LTD (3)· patent assignee history
2006–2008Patents assigned to SEMICONDUCTOR TECH ACAD RES CT (3)· patent assignee history
2006–2011Based in Hiroshima, JP· patent location history
2006–2007Based in Higashihiroshima, JP· patent location history
2009Patents assigned to ELPIDA MEMORY INC (2)· patent assignee history
2013–2014Based in Tochigi, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SONY CORP | 4 | 1993–1999 |
| HONDA MOTOR CO LTD | 3 | 1999–2014 |
| SEMICONDUCTOR TECH ACAD RES CT | 3 | 2006–2008 |
| TOSHIBA KK | 3 | 1995–1996 |
| ELPIDA MEMORY INC | 2 | 2009 |
Locations
| Location | Patents | Span |
|---|---|---|
| Hiroshima, JP | 5 | 2006–2011 |
| Miyagi, JP | 3 | 1993–1999 |
| Tokyo, JP | 3 | 1993–1996 |
| Tochigi, JP | 2 | 2013–2014 |
| Higashihiroshima, JP | 2 | 2006–2007 |