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Inventor

Yasuhiko Tsukikawa

Inventor
Hyogo, JP

Overview

40→
Patents
1991–2021
Patent span
Physics
Primary field (CPC G)

Patents· 40 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores63%
H10DInorganic electric semiconductor devices9%
H03KPulse technique7%
H10BElectronic memory devices7%
G01RMeasuring electric variables4%
C23CCoating metallic material2%
G05FSystems for regulating electric or magnetic variables2%
G06FElectric digital data processing2%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems2%
H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses2%
PatentTitleYear
10,991,418Semiconductor memory device comprising an interface conforming to JEDEC standard and control device therefor20217,288,965'Semiconductor device and level conversion circuit'20077,161,387'Semiconductor device and level conversion circuit'20077,102,935'Semiconductor memory device driven with low voltage'20067,072,204'Semiconductor memory device having dummy word line'20066,934,204'Semiconductor device with reduced terminal input capacitance'20056,903,961'Semiconductor memory device having twin-cell units'20056,867,994'Semiconductor memory device with memory cells arranged in high density'20056,787,859'Semiconductor memory device with shortened connection length among memory block, data buffer and data bus'20046,735,133'Semiconductor memory circuit having normal operation mode and burn-in test mode'20046,727,738'Configuration for generating a clock including a delay circuit and method thereof'20046,717,841'Semiconductor memory device having nonvolatile memory cell of high operating stability'20046,700,406'Multi-valued logical circuit with less latch-up'20046,687,174'Semiconductor memory device capable of switching output data width'20046,535,412'Semiconductor memory device capable of switching output data width'20036,469,952'Semiconductor memory device capable of reducing power supply voltage in a DRAM\'s word driver'20026,304,496'Semiconductor memory device with write driver reset function'20016,285,602'Semiconductor memory device provided with I/O clamp circuit'20016,269,038'Semiconductor memory device with test mode decision circuit'20016,249,462'Data output circuit that can drive output data speedily and semiconductor memory device including such a data output circuit'20016,201,748'Semiconductor memory device having test mode'20016,121,812'Delay circuit having delay time free from influence of operation environment'20006,061,285'Semiconductor memory device capable of executing earlier command operation in test mode'20006,005,434'Substrate potential generation circuit that can suppress variation of output voltage with respect to change in external power supply voltage and environment temperature'19995,995,427'Semiconductor memory device having test mode'19995,982,705'Semiconductor memory device permitting large output current from output buffer'19995,966,316'Semiconductor memory device having storage capacity of 2.sup.2N+1 bits'19995,905,690'Synchronous semiconductor device having circuitry capable of surely resetting test mode'19995,905,679'Semiconductor memory device clamping the overshoot and undershoot of input signal by circuit with PN junction'19995,761,141'Semiconductor memory device and test method therefor'19985,751,645'Semiconductor memory device with reduced output noise'19985,715,212'Semiconductor memory device comprising address transition detecting circuit having stable response characteristic for address signal conversion'19985,696,726'Complementary differential amplifier in which direct current amplification gain can be set arbitrarily and semiconductor memory divice using the same'19975,694,352'Semiconductor memory device having layout area of periphery of output pad reduced'19975,652,725'Semiconductor memory device having a redundant row and a redundant column which can be accessed prior to substitution'19975,619,457'Dynamic semiconductor memory device that can control through current of input buffer circuit for external input/output control signal'19975,563,840'Integrated semiconductor device'19965,448,516'Semiconductor memory device suitable for high integration'19955,394,365'Charge pump circuit having an improved charge pumping efficiency'19955,014,646'Method and apparatus for writing oxide film'1991

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1991Patents assigned to MATSUSHITA ELECTRIC INDUSTRIAL CO LTD (1)· patent assignee history
1991Based in Osaka, JP· patent location history
1995–2004Patents assigned to MITSUBISHI ELECTRIC CORP (25)· patent assignee history
1995–2007Based in Hyogo, JP· patent location history
2001Patents assigned to MITSUBISHI DENKI KABISHIKI KAI (1)· patent assignee history
2004–2007Patents assigned to RENESAS TECH CORP (12)· patent assignee history
2004–2021Based in Tokyo, JP· patent location history
2021Patents assigned to ZENTEL JAPAN CORP (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MITSUBISHI ELECTRIC CORP251995–2004
RENESAS TECH CORP122004–2007
MATSUSHITA ELECTRIC INDUSTRIAL CO LTD11991
MITSUBISHI DENKI KABISHIKI KAI12001
ZENTEL JAPAN CORP12021
Locations
LocationPatentsSpan
Hyogo, JP361995–2007
Tokyo, JP32004–2021
Osaka, JP11991