Inventor
Akihisa Ueno
Inventor
Cupertino, CA, US
Overview
Patents· 4 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1043%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1029%
B24BMachines, devices, or processes for grinding or polishing14%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems14%
PatentTitleYear
7,656,113'Device of pulse width modulation type for load drive'20106,503,828'Process for selective polishing of metal-filled trenches of integrated circuit structures'20036,417,093'Process for planarization of metal-filled trenches of integrated circuit structures by forming a layer of planarizable material over the metal layer prior to planarizing'20026,340,434'Method and apparatus for chemical-mechanical polishing'2002Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2002–2003Patents assigned to LSI LOGIC CORP (3)· patent assignee history
2002–2003Based in Cupertino, CA, US· patent location history
2002Based in Tsukuba, JP· patent location history
2010Patents assigned to PANASONIC CORP (1)· patent assignee history
2010Based in Kyoto, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| LSI LOGIC CORP | 3 | 2002–2003 |
| PANASONIC CORP | 1 | 2010 |
Locations
| Location | Patents | Span |
|---|---|---|
| Cupertino, California, US | 2 | 2002–2003 |
| Kyoto, JP | 1 | 2010 |
| Tsukuba, JP | 1 | 2002 |