Inventor

David S. Levitan

Inventor

Austin, TX, US

Overview

72→

Patents

1994–2020

Patent span

Physics

Primary field (CPC G)

Patents· 72 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing87%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use7%

G11CStatic stores2%

H04LTransmission of digital information, e.g. telegraphic communication2%

H03MCoding1%

PatentTitleYear

10,795,683Predicting indirect branches using problem branch filtering and pattern cache2020 10,678,551Operation of a multi-slice processor implementing tagged geometric history length (TAGE) branch prediction2020 10,664,279Instruction prefetching in a computer processor using a prefetch prediction vector2020 10,552,159Power management of branch predictors in a computer processor2020 10,552,162Variable latency flush filtering2020 10,528,352Blocking instruction fetching in a computer processor2020 10,528,353Generating a mask vector for determining a processor instruction address using an instruction tag in a multi-slice processor2020 10,467,008Identifying an effective address (EA) using an interrupt instruction tag (ITAG) in a multi-slice processor2019 10,379,857Dynamic sequential instruction prefetching2019 10,353,710Techniques for predicting a target address of an indirect branch instruction2019 10,275,256Branch prediction in a computer processor2019 10,248,555Managing an effective address table in a multi-slice processor2019 10,241,905Managing an effective address table in a multi-slice processor2019 10,175,987Instruction prefetching in a computer processor using a prefetch prediction vector2019 10,078,514Techniques for dynamic sequential instruction prefetching2018 10,037,207Power management of branch predictors in a computer processor2018 9,996,351Power management of branch predictors in a computer processor2018 9,983,878Branch prediction using multiple versions of history data2018 9,904,551'Branch prediction using multiple versions of history data'2018 9,898,295'Branch prediction using multiple versions of history data'2018 9,715,411'Techniques for mapping logical threads to physical threads in a simultaneous multithreading data processing system'2017 9,524,166'Tracking long GHV in high performance out-of-order superscalar processors'2016 9,495,164'Branch prediction using multiple versions of history data'2016 9,483,271'Compressed indirect prediction caches'2016 9,442,736'Techniques for selecting a predicted indirect branch address from global and local caches'2016 9,189,365'Hardware-assisted program trace collection with selectable call-signature capture'2015 9,170,920'Identifying and tagging breakpoint instructions for facilitation of software debug'2015 9,081,895'Identifying and tagging breakpoint instructions for facilitation of software debug'2015 9,069,563'Reducing store-hit-loads in an out-of-order processor'2015 8,943,299'Operating a stack of information in an information handling system'2015 8,943,301'Storing branch information in an address table of a processor'2015 8,868,886'Task switch immunized performance monitoring'2014 8,635,408'Controlling power of a cache based on predicting the instruction cache way for high power applications'2014 8,635,621'Method and apparatus to implement software to hardware thread priority'2014 8,370,671'Saving power by powering down an instruction fetch array based on capacity history of instruction buffer'2013 8,131,976'Tracking effective addresses in an out-of-order processor'2012 7,984,280'Storing branch information in an address table of a processor'2011 7,962,722'Branch target address cache with hashed indices'2011 7,890,738'Method and logical apparatus for managing processing system resource use for speculative execution'2011 7,877,586'Branch target address cache selectively applying a delayed hit'2011 7,865,705'Branch target address cache including address type tag bit'2011 7,844,807'Branch target address cache storing direct predictions'2010 7,809,933'System and method for optimizing branch logic for handling hard to predict indirect branches'2010 7,783,870'Branch target address cache'2010 7,689,816'Branch prediction with partially folded global history vector for reduced XOR operation time'2010 7,657,783'Apparatus and computer program product for testing ability to recover from cache directory errors'2010 7,487,334'Branch encoding before instruction cache write'2009 7,475,223'Fetch-side instruction dispatch group formation'2009 7,426,631'Methods and systems for storing branch information in an address table of a processor'2008 7,412,620'Method for testing ability to recover from cache directory errors'2008 7,269,715'Instruction grouping history on fetch-side dispatch group formation'2007 7,254,700'Fencing off instruction buffer until re-circulation of rejected preceding and branch instructions to avoid mispredict flush'2007 7,120,784'Thread-specific branch prediction by logically splitting branch history tables and predicted target address cache in a simultaneous multithreading processing environment'2006 7,039,768'Cache predictor for simultaneous multi-threaded processor system supporting multiple transactions'2006 7,032,097'Zero cycle penalty in selecting instructions in prefetch buffer in the event of a miss in the instruction cache'2006 7,000,233'Simultaneous multithread processor with result data delay path to adjust pipeline length for input to respective thread'2006 6,662,360'Method and system for software control of hardware branch prediction mechanism in a data processor'2003 6,651,162'Recursively accessing a branch target address cache using a target address previously accessed from the branch target address cache'2003 6,484,256'Apparatus and method of branch prediction utilizing a comparison of a branch history table to an aliasing table'2002 6,385,719'Method and apparatus for synchronizing parallel pipelines in a superscalar microprocessor'2002 6,304,959'Simplified method to generate BTAGs in a decode unit of a processing system'2001 6,279,105'Pipelined two-cycle branch target address cache'2001 5,918,044'Apparatus and method for instruction fetching using a multi-port instruction cache directory'1999 5,894,487'Error detection of directory arrays in dynamic circuits'1999 5,872,950'Method and apparatus for managing register renaming including a wraparound array and an indication of rename entry ages'1999 5,796,758'Self-checking content-addressable memory and method of operation for detecting multiple selected word lines'1998 5,796,998'Apparatus and method for performing branch target address calculation and branch prediciton in parallel in an information handling system'1998 5,765,221'Method and system of addressing which minimize memory utilized to store logical addresses by storing high order bits within a register'1998 5,758,143'Method for updating a branch history table in a processor which resolves multiple branches in a single cycle'1998 5,553,255'Data processor with programmable levels of speculative instruction fetching and method of operation'1996 5,421,020'Counter register implementation for speculative execution of branch on count instructions'1995 5,367,703'Method and system for enhanced branch history prediction accuracy in a superscalar processor system'1994

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1994–2020Patents assigned to IBM (71)· patent assignee history

1994–2020Based in Austin, TX, US· patent location history

2012–2015Patents assigned to LEVITAN DAVID S (6)· patent assignee history

2012–2015Patents assigned to MESTAN BRIAN R (3)· patent assignee history

2015Patents assigned to KONIGSBURG BRIAN R (3)· patent assignee history

2016Patents assigned to GLOBALFOUNDRIES INC (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
IBM	71	1994–2020
LEVITAN DAVID Sself	6	2012–2015
KONIGSBURG BRIAN R	3	2015
MESTAN BRIAN R	3	2012–2015
GLOBALFOUNDRIES INC	2	2016

Locations

Location	Patents	Span
Austin, Texas, US	72	1994–2020