Inventor
Mitsuhiro Kataoka
Inventor
Kariya, JP
Overview
Patents· 24 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices45%
H01JElectric discharge tubes or discharge lamps13%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1010%
H01LSemiconductor devices5%
H10NElectric solid-state devices not otherwise provided for5%
Y02EReduction of greenhouse gas [ghg] emissions, related to energy generation, transmission or distribution5%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests5%
B41JTypewriters3%
C23CCoating metallic material3%
F01NGas-flow silencers or exhaust apparatus for machines or engines in general3%
PatentTitleYear
9,951,671Heat transfer device, temperature controller, internal combustion engine, exhaust system thereof, and melting furnace20189,895,908'Printer'20189,530,630'Thermionic power generator'20169,508,533'Thermionic converter and manufacturing method of electrode of thermionic converter'20169,000,652'Thermionic generator'20158,970,088'Thermionic converter'2015RE043840'Silicon carbide semiconductor device'20127,821,013'Silicon carbide semiconductor device'20107,164,154'Gate wiring layout for silicon-carbide-based junction field effect transistor'20076,853,006'Silicon carbide semiconductor device'20056,573,534'Silicon carbide semiconductor device'20036,278,155'P-channel MOSFET semiconductor device having a low on resistance'20016,114,207'Method of producing a semiconductor device'20006,100,140'Manufacturing method of semiconductor device'20006,054,752'Semiconductor device'20006,015,737'Production method of a vertical type MOSFET'20005,952,679'Semiconductor substrate and method for straightening warp of semiconductor substrate'19995,925,911'Semiconductor device in which defects due to LOCOS or heat treatment are suppressed'19995,877,527'Semiconductor device and method of producing the same'19995,780,324'Method of manufacturing a vertical semiconductor device'19985,776,812'Manufacturing method of semiconductor device'19985,747,851'Semiconductor device with reduced breakdown voltage between the gate electrode and semiconductor surface'19985,698,880'Semiconductor device having a groove with a curved part formed on its side surface'19975,470,770'Manufacturing method of semiconductor device'1995Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1995–2000Patents assigned to NIPPON DENSO CO (6)· patent assignee history
1995–2012Based in Kariya, JP· patent location history
1998–2018Patents assigned to DENSO CORP (17)· patent assignee history
2005–2010Based in Nisshin, JP· patent location history
2012–2015Patents assigned to KATAOKA MITSUHIRO (3)· patent assignee history
2015Patents assigned to KIMURA YUJI (2)· patent assignee history
2015Patents assigned to SOBUE SUSUMU (2)· patent assignee history
2015–2018Based in Kasugai, JP· patent location history
2018Based in Singapore, SG· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| DENSO CORP | 17 | 1998–2018 |
| NIPPON DENSO CO | 6 | 1995–2000 |
| KATAOKA MITSUHIROself | 3 | 2012–2015 |
| KIMURA YUJI | 2 | 2015 |
| SOBUE SUSUMU | 2 | 2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kariya, JP | 15 | 1995–2012 |
| Kasugai, JP | 5 | 2015–2018 |
| Nisshin, JP | 3 | 2005–2010 |
| Singapore, SG | 1 | 2018 |