Inventor

Layne G. Bunker

Inventor
Boise, ID, US

Overview

40→
Patents
1994–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 40 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G11Cprimary
G11CStatic stores36%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1025%
H10BElectronic memory devices24%
G01RMeasuring electric variables5%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h105%
H01LSemiconductor devices4%
G06FElectric digital data processing3%
PatentTitleYear
10,629,502Apparatus and methods for through substrate via test202010,037,926Apparatus and methods for through substrate via test20189,318,394'Apparatus and methods for through substrate via test'20168,847,619'Apparatus and methods for through substrate via test'20148,189,423'256 Meg dynamic random access memory'20128,023,350'Memory malfunction prediction system and method'20117,977,962'Apparatus and methods for through substrate via test'20117,969,810'256 Meg dynamic random access memory'20117,773,441'Memory malfunction prediction system and method'20107,489,564'256 Meg dynamic random access memory'20097,477,557'256 Meg dynamic random access memory'20097,477,556'256 Meg dynamic random access memory'2009RE038955'Memory device having a relatively wide data bus'20066,934,173'256 Meg dynamic random access memory'20056,850,452'256 Meg dynamic random access memory'20056,756,836'256 Meg dynamic random access memory'20046,750,700'256 meg dynamic random access memory'20046,735,102'256 Meg dynamic random access memory'20046,710,630'256 Meg dynamic random access memory'20046,710,631'256 Meg dynamic random access memory'20046,696,867'Voltage generator with stability indicator circuit'20046,686,786'Voltage generator stability indicator circuit'20046,674,310'256 Meg dynamic random access memory'20046,631,084'256 Meg dynamic random access memory'20036,597,206'256 Meg dynamic random access memory'20036,594,168'256 Meg dynamic random access memory'20036,580,631'256 Meg dynamic random access memory'2003RE038109'Block write circuit and method for wide data path memory device'20036,556,065'256 Meg dynamic random access memory'20036,477,073'256 meg dynamic random access memory'20026,452,825'256 meg dynamic random access memory having a programmable multiplexor'20026,400,595'256 meg dynamic access memory'20026,324,088'256 meg dynamic random access memory'20016,314,011'256 Meg dynamic random access memory'20016,311,299'Data compression circuit and method for testing embedded memory devices'20016,166,942'Embedded DRAM architecture with local data drivers and programmable number of data read and data write lines'20006,141,286'Embedded DRAM architecture with local data drivers and programmable number of data read and data write lines'20006,034,900'Memory device having a relatively wide data bus'20006,011,727'Block write circuit and method for wide data path memory devices'20005,278,770'Method for generating input data for an electronic circuit simulator'1994

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1994–2014Patents assigned to BUNKER LAYNE (2)· patent assignee history
1994–2020Based in Boise, ID, US· patent location history
2000–2020Patents assigned to MICRON TECHNOLOGY INC (36)· patent assignee history
2011–2012Patents assigned to ROUND ROCK RES LLC (2)· patent assignee history
2012Patents assigned to BEFFA RAYMOND J (1)· patent assignee history
2012Patents assigned to BUNKER LAYNE G (1)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
MICRON TECHNOLOGY INC362000–2020
BUNKER LAYNEself21994–2014
ROUND ROCK RES LLC22011–2012
BEFFA RAYMOND J12012
BUNKER LAYNE Gself12012
Locations
LocationPatentsSpan
Boise, ID, US401994–2020