Inventor
Yongseon Koh
Inventor
Palo Alto, CA, US
Overview
Patents· 16 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H04Bprimary
H04BTransmission19%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1015%
H03FAmplifiers11%
H03KPulse technique11%
H04LTransmission of digital information, e.g. telegraphic communication11%
G02BOptical elements, systems or apparatus7%
H05KPrinted circuits7%
G01RMeasuring electric variables4%
G06FElectric digital data processing4%
H02JElectric power networks4%
PatentTitleYear
8,928,398'Differential analog signal processing stage with reduced even order harmonic distortion'20158,588,289'Adaptive signal equalizer with segmented coarse and fine controls'20138,325,791'System and method for providing adaptively equalized data signal with alternately adjusted data signal boost and sliced data signal amplitude'20128,270,463'System and method for adaptively equalizing data signals with higher and lower data rates'20127,994,807'Built-in test circuit for testing AC transfer characteristic of high-speed analog circuit'20117,902,013'Method of forming a semiconductor die with reduced RF attenuation'20117,649,409'All-pass termination network with equalization and wide common-mode range'20107,598,575'Semiconductor die with reduced RF attenuation'20097,395,286'Method for generating non-overlapping N-phases of divide-by-N clocks with precise 1/N duty ratio using a shift register'20087,256,651'System and method for providing a constant swing high-gain complementary differential limiting amplifier'20077,209,007'Combined analog signal gain controller and equalizer'20077,086,788'Optical sub-assembly for opto-electronic modules'20066,970,048'Inductive-capacitive (LC) based quadrature voltage controlled oscillator (VCO) with deterministic quadrature signal phase relationship'20056,950,490'Fault state detection mechanism for a ring-counter-based frequency divider-by-N that generates non-overlapping N-phases of divide-by-N clocks with 1/N duty ratio'20056,916,121'Optical sub-assembly for optoelectronic modules'20056,320,422'Complementary source coupled logic'2001Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2001–2013Patents assigned to NAT SEMICONDUCTOR CORP (15)· patent assignee history
2001–2006Based in Sunnyvale, CA, US· patent location history
2005–2015Based in Palo Alto, CA, US· patent location history
2012–2013Patents assigned to BUCHANAN BENJAMIN (3)· patent assignee history
2012–2013Patents assigned to KOH YONGSEON (3)· patent assignee history
2012–2013Patents assigned to NODENOT NICOLAS (3)· patent assignee history
2012–2013Patents assigned to RANE AMIT (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NAT SEMICONDUCTOR CORP | 15 | 2001–2013 |
| BUCHANAN BENJAMIN | 3 | 2012–2013 |
| KOH YONGSEONself | 3 | 2012–2013 |
| NODENOT NICOLAS | 3 | 2012–2013 |
| RANE AMIT | 3 | 2012–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Palo Alto, California, US | 13 | 2005–2015 |
| Sunnyvale, California, US | 3 | 2001–2006 |