Inventor

Nicholas K. Eib

Inventor

San Jose, CA, US

Overview

1997–2015

Patent span

Physics

Primary field (CPC G)

Patents· 30 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G03Fprimary

G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices40%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1015%

H10DInorganic electric semiconductor devices11%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%

B24BMachines, devices, or processes for grinding or polishing5%

G02BOptical elements, systems or apparatus5%

G03BApparatus or arrangements for taking photographs or for projecting or viewing them5%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests5%

G06FElectric digital data processing4%

H01JElectric discharge tubes or discharge lamps2%

PatentTitleYear

9,188,848'Maskless vortex phase shift optical direct write lithography'2015 8,377,633'Maskless vortex phase shift optical direct write lithography'2013 8,057,963'Maskless vortex phase shift optical direct write lithography'2011 8,012,873'Method for providing temperature uniformity of rapid thermal annealing'2011 7,738,078'Optimized mirror design for optical direct write'2010 7,634,389'Reflectivity optimization for multilayer stacks'2009 7,499,146'Lithographic apparatus and device manufacturing method, an integrated circuit, a flat panel display, and a method of compensating for cupping'2009 7,372,547'Process and apparatus for achieving single exposure pattern transfer using maskless optical direct write lithography'2008 7,313,508'Process window compliant corrections of design layout'2007 7,270,942'Optimized mirror design for optical direct write'2007 7,264,906'OPC based illumination optimization with mask error constraints'2007 7,189,498'Process and apparatus for generating a strong phase shift optical pattern for use in an optical direct write lithography process'2007 6,809,824'Alignment process for integrated circuit structures on semiconductor substrate using scatterometry measurements of latent images in spaced apart test fields on substrate'2004 6,759,337'Process for etching a controllable thickness of oxide on an integrated circuit structure on a semiconductor substrate using nitrogen plasma and plasma and an rf bias applied to the substrate'2004 6,532,585'Method and apparatus for application of proximity correction with relative segmentation'2003 6,499,003'Method and apparatus for application of proximity correction with unitary segmentation'2002 6,425,117'System and method for performing optical proximity correction on the interface between optical proximity corrected cells'2002 6,413,881'PROCESS FOR FORMING THIN GATE OXIDE WITH ENHANCED RELIABILITY BY NITRIDATION OF UPPER SURFACE OF GATE OF OXIDE TO FORM BARRIER OF NITROGEN ATOMS IN UPPER SURFACE REGION OF GATE OXIDE, AND RESULTING PRODUCT'2002 6,282,696'Performing optical proximity correction with the aid of design rule checkers'2001 6,269,472'Optical proximity correction method and apparatus'2001 6,174,630'Method of proximity correction with relative segmentation'2001 6,175,953'Method and apparatus for general systematic application of proximity correction'2001 6,109,775'Method for adjusting the density of lines and contact openings across a substrate region for improving the chemical-mechanical polishing of a thin-film later disposed thereon'2000 5,900,338'Performing optical proximity correction with the aid of design rule checkers'1999 5,897,381'Method of forming a layer and semiconductor substrate'1999 5,893,952'Apparatus for rapid thermal processing of a wafer'1999 5,756,369'Rapid thermal processing using a narrowband infrared source and feedback'1998 5,723,233'Optical proximity correction method and apparatus'1998 5,705,301'Performing optical proximity correction with the aid of design rule checkers'1998 5,682,323'System and method for performing optical proximity correction on macrocell libraries'1997

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1997–2009Patents assigned to LSI LOGIC CORP (20)· patent assignee history

1997–2015Based in San Jose, CA, US· patent location history

2007–2013Patents assigned to LSI CORP (8)· patent assignee history

2011–2013Patents assigned to CALLAN NEAL P (2)· patent assignee history

2011–2013Patents assigned to CROFFIE EBO H (2)· patent assignee history

2011–2013Patents assigned to EIB NICHOLAS K (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
LSI LOGIC CORP	20	1997–2009
LSI CORP	8	2007–2013
CALLAN NEAL P	2	2011–2013
CROFFIE EBO H	2	2011–2013
EIB NICHOLAS Kself	2	2011–2013

Locations

Location	Patents	Span
San Jose, California, US	30	1997–2015