Inventor
Valerie L. Lines
Inventor
Ottawa, CA
Overview
Patents· 42 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores64%
H02MApparatus for conversion between ac and ac, between ac and dc, or between dc and dc, and for use with mains or similar power supply systems15%
G05FSystems for regulating electric or magnetic variables14%
H03KPulse technique5%
G06FElectric digital data processing3%
PatentTitleYear
9,196,319'Pre-charge voltage generation and power saving modes'20158,699,288'Pre-charge voltage generation and power saving modes'20148,279,685'Pre-charge voltage generation and power saving modes'20128,149,634'Low power memory architecture'20128,023,314'Dynamic memory word line driver scheme'20117,903,477'Pre-charge voltage generation and power saving modes'20117,555,659'Low power memory architecture'20097,541,837'Voltage level shifter circuit'20097,535,749'Dynamic memory word line driver scheme'20097,382,638'Matchline sense circuit and method'20087,312,636'Voltage level shifter circuit'20077,251,148'Matchline sense circuit and method'20077,043,601'Priority encoder circuit and method'20067,038,937'Dynamic memory word line driver scheme'20066,987,682'Matchline sense circuit and method'20066,980,448'DRAM boosted voltage supply'20056,693,814'Priority encoder circuit and method'20046,667,924'Circuit and method for multiple match detection in content addressable memories'20036,614,705'Dynamic random access memory boosted voltage supply'20036,608,788'Bitline precharge'20036,603,703'Dynamic memory word line driver scheme'20036,580,654'Boosted voltage supply'20036,538,947'Method for multiple match detection in content addressable memories'20036,504,775'Bitline precharge'20036,483,733'Dynamic content addressable memory cell'20026,320,777'Dynamic content addressable memory cell'20016,307,798'Circuit and method for multiple match detection in content addressable memories'20016,278,640'Dynamic memory word line driver scheme'20016,236,581'High voltage boosted word line supply charge pump and regulator for DRAM'20016,134,153'Bi-directional data bus scheme with optimized read and write characters'20006,061,277'Dynamic memory word line driver scheme'20006,055,201'High voltage boosted word line supply charge pump and regulator for DRAM'20005,933,047'High voltage generating circuit for volatile semiconductor memories'19995,828,620'High voltage boosted word line supply charge pump and regulator for DRAM'19985,822,253'Dynamic memory word line driver scheme'19985,751,643'Dynamic memory word line driver'19985,699,313'High voltage boosted word line supply charge pump and regulator for dram'19975,406,523'High voltage boosted word line supply charge pump and regulator for DRAM'19955,267,201'High voltage boosted word line supply charge pump regulator for DRAM'19935,255,232'DRAM cell plate and precharge voltage generator'19935,245,576'Dynamic memory row/column redundancy scheme'19935,214,602'Dynamic memory word line driver scheme'1993Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1993–2012Patents assigned to LINES VALERIE L (3)· patent assignee history
1993Patents assigned to MOSAID INC (3)· patent assignee history
1993–2015Based in Ottawa, CA· patent location history
1995–2014Patents assigned to MOSAID TECHNOLOGIES INC (36)· patent assignee history
2012–2014Patents assigned to OH HAKJUNE (2)· patent assignee history
2015Patents assigned to CONVERSANT INTELLECTUAL PROPERTY MAN INC (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MOSAID TECHNOLOGIES INC | 36 | 1995–2014 |
| LINES VALERIE Lself | 3 | 1993–2012 |
| MOSAID INC | 3 | 1993 |
| OH HAKJUNE | 2 | 2012–2014 |
| CONVERSANT INTELLECTUAL PROPERTY MAN INC | 1 | 2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Ottawa, CA | 42 | 1993–2015 |